From ea9a31b1f8f06a8c80ade4ed8a1a3df30bf5e51e Mon Sep 17 00:00:00 2001 From: Sven Riwoldt Date: Sat, 6 Apr 2024 18:15:41 +0200 Subject: [PATCH] Init --- Assembler.tex | 41 ++++++++ Defs.tex | 71 ++++++++++++++ Elemente/And.tex | 60 ++++++++++++ Elemente/Not.tex | 60 ++++++++++++ Elemente/Or.tex | 67 +++++++++++++ Elemente/XOR.tex | 97 +++++++++++++++++++ Grafiken/AndANSI.tex | 29 ++++++ Grafiken/AndANSIStandAlone.tex | 48 +++++++++ Grafiken/NotANSI.tex | 28 ++++++ Grafiken/NotTransistor.png | 1 + Grafiken/OrANSI.tex | 31 ++++++ Grafiken/OrANSIComplete.tex | 38 ++++++++ Grafiken/OrANSICompleteStandAlone.tex | 96 ++++++++++++++++++ Grafiken/OrANSIStandAlone.tex | 50 ++++++++++ Grafiken/XORANSI.tex | 50 ++++++++++ IEC/AndIEC.pdf | 1 + IEC/AndIEC.png | 1 + IEC/AndIEC.tex | 40 ++++++++ IEC/NotIEC.pdf | 1 + IEC/NotIEC.png | 1 + IEC/NotIEC.tex | 32 ++++++ IEC/OrIEC.pdf | 1 + IEC/OrIEC.png | 1 + IEC/OrIEC.tex | 22 +++++ IEC/OrIECStandAlone.tex | 40 ++++++++ Tools/CPU-Design.odg | 1 + Tools/CPU.odg | 1 + Tools/CSE390b_Week5_Lecture9.pdf | 1 + ...zker, Klaus Urbanski, Roland Woitowitz.pdf | 1 + Tools/Digitaltechnik by Klaus Fricke.pdf | 1 + Tools/Nand2Tetris.odt | 1 + Tools/P5CPU.odt | 1 + Tools/P5CPU.pdf | 1 + Tools/VHDL_QuickRef.pdf | 1 + Tools/VorlageMinipage.tex | 11 +++ Tools/convert2svg.sh | 1 + Tools/lec08_HackML.pdf | 1 + Tools/workbook.pdf | 1 + 38 files changed, 930 insertions(+) create mode 100644 Assembler.tex create mode 100644 Defs.tex create mode 100644 Elemente/And.tex create mode 100644 Elemente/Not.tex create mode 100644 Elemente/Or.tex create mode 100644 Elemente/XOR.tex create mode 100644 Grafiken/AndANSI.tex create mode 100644 Grafiken/AndANSIStandAlone.tex create mode 100644 Grafiken/NotANSI.tex create mode 100644 Grafiken/NotTransistor.png create mode 100644 Grafiken/OrANSI.tex create mode 100644 Grafiken/OrANSIComplete.tex create mode 100644 Grafiken/OrANSICompleteStandAlone.tex create mode 100644 Grafiken/OrANSIStandAlone.tex create mode 100644 Grafiken/XORANSI.tex create mode 100644 IEC/AndIEC.pdf create mode 100644 IEC/AndIEC.png create mode 100644 IEC/AndIEC.tex create mode 100644 IEC/NotIEC.pdf create mode 100644 IEC/NotIEC.png create mode 100644 IEC/NotIEC.tex create mode 100644 IEC/OrIEC.pdf create mode 100644 IEC/OrIEC.png create mode 100644 IEC/OrIEC.tex create mode 100644 IEC/OrIECStandAlone.tex create mode 100644 Tools/CPU-Design.odg create mode 100644 Tools/CPU.odg create mode 100644 Tools/CSE390b_Week5_Lecture9.pdf create mode 100644 Tools/Digitaltechnik Grundlagen, VHDL, FPGAs, Mikrocontroller by Winfried Gehrke, Marco Winzker, Klaus Urbanski, Roland Woitowitz.pdf create mode 100644 Tools/Digitaltechnik by Klaus Fricke.pdf create mode 100644 Tools/Nand2Tetris.odt create mode 100644 Tools/P5CPU.odt create mode 100644 Tools/P5CPU.pdf create mode 100644 Tools/VHDL_QuickRef.pdf create mode 100644 Tools/VorlageMinipage.tex create mode 100644 Tools/convert2svg.sh create mode 100644 Tools/lec08_HackML.pdf create mode 100644 Tools/workbook.pdf diff --git a/Assembler.tex b/Assembler.tex new file mode 100644 index 0000000..52fce42 --- /dev/null +++ b/Assembler.tex @@ -0,0 +1,41 @@ +\documentclass[12pt,a4paper,pagesize, DIVcalc,BCOR1cm, smallheadings, twoside]{scrbook} + +\include{Defs} +\begin{document} + + +\newrgbcolor{lila}{0.6 0.2 0.5} +\newrgbcolor{darkyellow}{1 0.9 0} + +\setlength{\parindent}{0em} + + +\chapter{Projekt 1} + +\input{Elemente/Not} + +\newpage +\input{Elemente/And} + +\newpage +\input{Elemente/Or} + +\newpage +\input{Elemente/XOR} + +\newpage +\section*{Zu Verarbeiten} + +\url{https://www.homofaciens.de/technics-base-circuits-logic-gates_ge.htm} +\url{https://www.semiversus.com/dic/grundlagen_der_digitaltechnik/kombinatorik.html} +\url{https://www.electronics-tutorials.ws/de/logische/nand-gatter.html} + + + +\url{https://yizhe87.medium.com/from-nand-to-tetris-nand2tetris-project-6-f588730ab769} + +\url{https://github.com/ossu/computer-science?tab=readme-ov-file} + +\url{https://tex.stackexchange.com/questions/94607/3-input-logic-gate-on-circuitikz} + +\end{document} diff --git a/Defs.tex b/Defs.tex new file mode 100644 index 0000000..77ddde0 --- /dev/null +++ b/Defs.tex @@ -0,0 +1,71 @@ +\usepackage{multicol} +\setlength{\columnsep}{1cm} + + + +\usepackage{amsmath} +\usepackage{amsfonts} +\usepackage{microtype,ellipsis,fixltx2e,mparhack} +\usepackage{amssymb} +\usepackage{graphicx}% + +\usepackage{booktabs} + +\usepackage{minted} + +\usepackage{babel} +\usepackage[utf8]{inputenc} +\usepackage[T1]{fontenc} + +\usepackage{longtable} +%\usepackage[latin1]{inputenc} + +\usepackage{tikz} +\usetikzlibrary{arrows} +\usepackage{geometry} %paperwidth=left+width+right paperheight=top+height+bottom left = inner +\geometry{left=25mm, right=25mm, width=160mm} + +\usepackage{pstricks,pst-node} +\usepackage[colorlinks = false,pdfborder={0 0 0}]{hyperref} +\pdfcompresslevel=9 + +\usepackage{nameref} + \usepackage{hyperref} + \usepackage{sidecap} + +\definecolor{Red}{rgb}{1,0,0} +%\setlength{\emergencystretch}{20pt} \emergencystretch=3pt\relax \setlength{\tolerance}{2000} +\newcommand{\clearemptydoublepage}{\newpage{\pagestyle{empty}\cleardoublepage}} +\clubpenalty=2500 \widowpenalty=10000 + + +\newcommand{\IR}{I\hspace{-1.4mm}R} +\newcommand{\IN}{I\hspace{-1.4mm}N} +\newcommand{\tabumg}{\hspace{10mm}\=hspace{10mm}\=hspace{10mm}\=hspace{10mm}\kill \\} +\newcommand{\entspricht}{\stackrel{\scriptscriptstyle\wedge}{=}} + +\newlength\tindent +\setlength{\tindent}{\parindent} +\setlength{\parindent}{0pt} +\renewcommand{\indent}{\hspace*{\tindent}} + +\usepackage{showframe} +\usepackage{pgf,tikz,pgfplots} + +\usepackage{tkz-euclide} + +\usetikzlibrary{angles, arrows.meta, quotes, calc, babel, fadings,quotes} + +\usetikzlibrary{intersections,through,backgrounds} +\usepackage{circuitikz} + +\usepackage{blindtext} + +\makeatother + +%!tikz preamble end + +\newlength{\crossing} +\makeatletter +\setlength{\crossing}{\ctikzvalof{bipoles/crossing/size}\pgf@circ@Rlen} +\makeatother diff --git a/Elemente/And.tex b/Elemente/And.tex new file mode 100644 index 0000000..51ca946 --- /dev/null +++ b/Elemente/And.tex @@ -0,0 +1,60 @@ +\begin{multicols}{2} +[ +\section{AND} +] + +\subsection{VHDL} + \begin{minted}{vhdl} +/** + * And gate: + * out = 1 if (a == 1 and b == 1) + * 0 otherwise + */ + +CHIP And { + IN a, b; + OUT out; + + PARTS: + Nand(a=a ,b=b ,out=nandout); + Not(in=nandout ,out=out); +} +\end{minted} + +\subsection{Wertetabelle} +\begin{table}[H] + \centering + \begin{tabular}{cc|c} + a& b& a $\wedge$ b\\ \hline + 0& 0& 0\\ + 0& 1& 0\\ + 1& 0& 0\\ + 1& 1& 1\\ + \end{tabular} + \label{tab:and} +\end{table} + +\subsection{Aufbau mit Nand} +\begin{figure}[H] +\centering + \centering + \input{Grafiken/AndANSI} + \caption{Enter Caption} + \label{fig:enter-label} +\end{figure} + + +\subsection{Darstellung nach IEC} +\begin{figure}[H] +\centering + \centering + \includegraphics[width=0.75\linewidth]{IEC/AndIEC.png} + \caption{Enter Caption} + \label{fig:enter-label} +\end{figure} + + +\end{multicols} + + + diff --git a/Elemente/Not.tex b/Elemente/Not.tex new file mode 100644 index 0000000..993ecc1 --- /dev/null +++ b/Elemente/Not.tex @@ -0,0 +1,60 @@ +\section{Not} + +\begin{minipage}[t]{0.5\linewidth} + \begin{minted}{vhdl} +/** + * Not gate: + * out = not in + */ + +CHIP Not { + IN in; + OUT out; + + PARTS: + Nand(a=in,b=in,out=out); + // Put your code here: +} +\end{minted} + \end{minipage}\hfill +%\raisebox{\dimexpr \ht\strutbox-\totalheight}{ +\raisebox{-0.5\height}{ +\begin{minipage}[t]{0.4\linewidth} + \begin{figure}[H] +\centering +\include{Grafiken/NotANSI}\caption{Not(ANSI)} +\label{fig:NotANSI} +\end{figure} +\end{minipage}} + +%%%%%%%%%%%%%%%%%% + +\begin{minipage}[t]{0.5\linewidth} +\begin{table}[H] + \centering + \begin{tabular}{c|c} + in& $\neg$ in\\ \hline + 0& 1\\ + 1& 0\\ +\end{tabular} +\label{tab:not} +\end{table} +\end{minipage}\hfill +\raisebox{-0.5\height}{ +\begin{minipage}[t]{0.4\linewidth} +\begin{figure}[H] +\centering +\includegraphics{IEC/NotIEC.pdf}\caption{Not(IEC)} +\label{fig:NotIEC} +\end{figure} + +\end{minipage}} + +\begin{figure} + \centering + \includegraphics[width=0.25\linewidth]{Grafiken/NotTransistor.png} + \caption{Enter Caption} + \label{fig:enter-label} +\end{figure} +%%%%%%%%%%%%%%%%%% + diff --git a/Elemente/Or.tex b/Elemente/Or.tex new file mode 100644 index 0000000..6f41e08 --- /dev/null +++ b/Elemente/Or.tex @@ -0,0 +1,67 @@ +\begin{multicols*}{2} +[ +\section{OR} +] + +\subsection{VHDL} +\begin{minted}{vhdl} + /** + * Or gate: + * out = 1 if (a == 1 or b == 1) + * 0 otherwise + */ + +CHIP Or { + IN a, b; + OUT out; + + PARTS: + Not(in=a,out=nota); + Not(in=b,out=notb); + Nand(a=nota,b=notb,out=out); +} +\end{minted} + +\subsection{Wertetabelle} +\begin{table}[H] + \centering + \begin{tabular}{cc|c} + a& b& out\\ \hline + 0& 0& 0\\ + 0& 1& 1\\ + 1& 0& 1\\ + 1& 1& 1\\ + \end{tabular} + \label{tab:or} +\end{table} + +\subsection{Aufbau mit Nand} +\begin{figure}[H] +\centering + \centering + \include{Grafiken/OrANSIComplete} + \caption{Enter Caption} + \label{fig:enter-label} +\end{figure} + +\subsection{Darstellung nach ANSI} +\begin{figure}[H] +\centering + \centering + \include{Grafiken/OrANSI} + \caption{Enter Caption} + \label{fig:enter-label} +\end{figure} + +\subsection{Darstellung nach IEC} +\begin{figure}[H] +\centering + \centering + \includegraphics[width=0.75\linewidth]{IEC/OrIEC.png} + \caption{Enter Caption} + \label{fig:enter-label} +\end{figure} + + +\end{multicols*} + diff --git a/Elemente/XOR.tex b/Elemente/XOR.tex new file mode 100644 index 0000000..4846a48 --- /dev/null +++ b/Elemente/XOR.tex @@ -0,0 +1,97 @@ +%\begin{multicols*}{2} +%[ +\section{XOR} +%] + +\subsection{VHDL} +\begin{minted}{vhdl} + +/** + * Exclusive-or gate: + * out = not (a == b) + */ + +CHIP Xor { + IN a, b; + OUT out; + + PARTS: + Not(in=a, out=nota); + Not(in=b, out=notb); + Nand(a=nota, b=b, out=nandout1); + Nand(a=a, b=notb, out=nandout2); + Nand(a=nandout1, b=nandout2, out=out); +} + +\end{minted} + +\subsection{Wertetabelle} +\begin{table}[H] + \centering + \begin{tabular}{cc|c} + a& b& $a\oplus b = out$ \\ \hline + 0& 0& 0\\ + 0& 1& 1\\ + 1& 0& 1\\ + 1& 1& 0\\ + \end{tabular} + \label{tab:or} +\end{table} + +\subsection{Aufbau mit Nand} +\begin{figure}[H] +\centering + \centering + \include{Grafiken/XORANSI} + \caption{Enter Caption} + \label{fig:enter-label} +\end{figure} + + + +\begin{table} + \centering + \begin{tabular}{|c|c|c|c|c|c|} \hline + a& b& N1& N2& $N1\barwedge b = N3$&$N2\barwedge a=N4$\\ \hline + 0& 0& 1& 1& 1 &1\\ \hline + 0& 1& 1& 0& 0&0\\ \hline + 1& 0& 0& 1& 1 &1\\ \hline + 1& 1& 0& 0& 1&1\\ \hline +\begin{tikzpicture} \draw[color=green,line width=3] (0,0) --(0.3,0); +\end{tikzpicture} & \begin{tikzpicture} +\draw[color=red,line width=3] (0,0)--(0.3,0); +\end{tikzpicture} & \begin{tikzpicture} +\draw[color=red,line width=3] (0,0)--(0.3,0); +\end{tikzpicture} & \begin{tikzpicture}\draw[color=green,line width=3] (0,0) --(0.3,0); +\end{tikzpicture} &\begin{tikzpicture} +\draw[color=red,line width=3] (0,0)--(0.3,0); +\end{tikzpicture} &\begin{tikzpicture} +\draw[color=green,line width=3] (0,0)--(0.3,0); +\end{tikzpicture}\\\hline + \end{tabular} + \caption{Caption} + \label{tab:my_label} +\end{table} + + +\subsection{Darstellung nach ANSI} +\begin{figure}[H] +\centering + \centering + % \include{Grafiken/OrANSI} + \caption{Enter Caption} + \label{fig:enter-label} +\end{figure} + +\subsection{Darstellung nach IEC} +\begin{figure}[H] +\centering + \centering +% \includegraphics[width=0.75\linewidth]{IEC/OrIEC.png} + \caption{Enter Caption} + \label{fig:enter-label} +\end{figure} + + +%\end{multicols*} + diff --git a/Grafiken/AndANSI.tex b/Grafiken/AndANSI.tex new file mode 100644 index 0000000..5003490 --- /dev/null +++ b/Grafiken/AndANSI.tex @@ -0,0 +1,29 @@ +\begin{tikzpicture}[scale=1,transform shape] +\ctikzset{ + logic ports=ieee, + logic ports/scale=1, +% logic ports/fill=lightgray + % Koordinaten für Kreuzpunkte + } +\coordinate (A) at (2.75,0.5); + \fill (A) circle (1.5pt); + + % Eingangsvariablen + \node (x2) at (0.15,0.225) {b}; + \node (x1) at (0.15,0.775) {a}; + + % Ausgangsvariable + \node (y) at (6,0.5) {out}; + + % Gatter + \node[nand port] at (1.5,0.5) (n1) {}; + \node[nand port] at (4,0.5) (n2) {}; + + \draw(x1) -- (n1.in 1); + \draw(x2) -- (n1.in 2); + \draw(n1.out) -- (A); + \draw(A) |- (n2.in 2); + \draw(A) |- (n2.in 1); + \draw(n2.out) -- (y); + +\end{tikzpicture} \ No newline at end of file diff --git a/Grafiken/AndANSIStandAlone.tex b/Grafiken/AndANSIStandAlone.tex new file mode 100644 index 0000000..2fd2098 --- /dev/null +++ b/Grafiken/AndANSIStandAlone.tex @@ -0,0 +1,48 @@ +%!tikz editor 1.0 +\documentclass{article} +\usepackage{tikz} +\usepackage[graphics, active, tightpage]{preview} +\usepackage{circuitikz} +\PreviewEnvironment{tikzpicture} + +%!tikz preamble begin +%\usetikzlibrary{circuits.logic.US, positioning} +\usepackage{circuitikz} +\usepackage[utf8]{inputenc} +%!tikz preamble end + + +\begin{document} +%!tikz source begin +\begin{tikzpicture}[scale=6,transform shape] +\ctikzset{ + logic ports=ieee, + logic ports/scale=1, +% logic ports/fill=lightgray + % Koordinaten für Kreuzpunkte + } +\coordinate (A) at (2.75,0.5); + \fill (A) circle (1.5pt); + + % Eingangsvariablen + \node (x2) at (0.15,0.225) {b}; + \node (x1) at (0.15,0.775) {a}; + + % Ausgangsvariable + \node (y) at (6,0.5) {out}; + + % Gatter + \node[nand port] at (1.5,0.5) (n1) {}; + \node[nand port] at (4,0.5) (n2) {}; + + \draw(x1) -- (n1.in 1); + \draw(x2) -- (n1.in 2); + \draw(n1.out) -- (A); + \draw(A) |- (n2.in 2); + \draw(A) |- (n2.in 1); + \draw(n2.out) -- (y); + +\end{tikzpicture} +%!tikz source end + +\end{document} \ No newline at end of file diff --git a/Grafiken/NotANSI.tex b/Grafiken/NotANSI.tex new file mode 100644 index 0000000..f642727 --- /dev/null +++ b/Grafiken/NotANSI.tex @@ -0,0 +1,28 @@ +\begin{tikzpicture} +\node (in) at (0.5,1) {in}; +\node (inp) at (0.65,1) {}; + +\node (out) at (4,1) {out}; +\node (outp) at (3.8,1) {}; + + +\ctikzset{ + logic ports=ieee, + logic ports/scale=1, +} + +\node[nand port] (Nand) at (2.5,1){};%\small{Nand}}; + +\draw (Nand.in 1) |- (in) ; +\draw (Nand.in 2) |- (in); + +\draw[name path = pin1] (Nand.in 1) |- (in) ; +\draw[name path = pin2] (Nand.in 2) |- (in); + +\draw [fill=white]( [xshift=3pt] inp) circle (2pt); +\draw [fill=white]( [xshift=-5pt] outp) circle (2pt); + +\path[name intersections={of=pin1 and pin2, by=e}]; +\fill[] (e) circle[radius=0.075]; + +\end{tikzpicture} \ No newline at end of file diff --git a/Grafiken/NotTransistor.png b/Grafiken/NotTransistor.png new file mode 100644 index 0000000..8537307 --- /dev/null +++ b/Grafiken/NotTransistor.png @@ -0,0 +1 @@ +Not Found \ No newline at end of file diff --git a/Grafiken/OrANSI.tex b/Grafiken/OrANSI.tex new file mode 100644 index 0000000..c168f46 --- /dev/null +++ b/Grafiken/OrANSI.tex @@ -0,0 +1,31 @@ +\begin{tikzpicture}[scale=1, transform shape] +\tikzstyle{branch}=[fill,shape=circle,minimum size=1pt,inner sep=pt] + + + \ctikzset{ + logic ports=ieee, + logic ports/scale=1, + % logic ports/fill=lightgray + % Koordinaten für Kreuzpunkte + } + +\node[not port] at (1.25,1)(nota){}; +\node[not port] at (1.25,3)(notb){}; +\node[nand port] at (4,2)(n2){}; + +\node (a) at (0,1) {$a$}; +\node (b) at (0,3) {$b$}; +\node (out1) at (2.5,2) {}; +\node (y) at (6,2) {$out$}; + + +\draw(nota.in) -- (a); +\draw(notb.in) -- (b); +\draw(nota.out) --++ (0.5,0) --++ (0,0.72)-| ($(n2.in 2)$); +\draw(notb.out) --++ (0.5,0) --++ (0,-0.72)-| ($(n2.in 1)$); +%\draw(n2.input 2) -| ($(out1)$); + +\draw(n2.out) -- (y); + + +\end{tikzpicture} \ No newline at end of file diff --git a/Grafiken/OrANSIComplete.tex b/Grafiken/OrANSIComplete.tex new file mode 100644 index 0000000..a6ae6c4 --- /dev/null +++ b/Grafiken/OrANSIComplete.tex @@ -0,0 +1,38 @@ +\begin{tikzpicture}[scale=1,transform shape] +\ctikzset{ + logic ports=ieee, + logic ports/scale=1, + } + +\node[nand port] at (1.75,0.56)(nota){}; +\node[nand port] at (1.75,4*0.56)(notb){}; +\node[nand port] at (4.,2.5*0.56)(n2){}; + + +\draw (nota.out) |- (n2.in 2); +\draw (notb.out) |- (n2.in 1); + +\node (a) at (0,0.56) {$a$}; +\node (b) at (0,2.2384) {$b$}; +\node (y) at (5.5,2.5*0.56) {$out$}; + +\coordinate (A) at (0.45,0.841-0.2814); +\fill (A) circle (1.5pt); + +\draw[name path = a1] (A) |- (nota.in 1); +\draw[name path = a2] (A) |- (nota.in 2); +\draw (A) --++ (-.25,0); + + +\coordinate (B) at (0.45,2.2384); +\fill (B) circle (1.5pt); + +\draw (B) |- (notb.in 1); +\draw (B) |- (notb.in 2); +\draw (B) --++ (-.25,0); + + +\draw (nota.out) |- node[below, yshift=-15pt, xshift=5pt]{\small$nota$}(n2.in 2); +\draw (notb.out) |- node[above, yshift=15pt, xshift=5pt]{\small$notb$}(n2.in 1); + +\end{tikzpicture} \ No newline at end of file diff --git a/Grafiken/OrANSICompleteStandAlone.tex b/Grafiken/OrANSICompleteStandAlone.tex new file mode 100644 index 0000000..016cf64 --- /dev/null +++ b/Grafiken/OrANSICompleteStandAlone.tex @@ -0,0 +1,96 @@ +%!tikz editor 1.0 +\documentclass{article} +\usepackage{tikz} +\usepackage[graphics, active, tightpage]{preview} +\usepackage{circuitikz} +\PreviewEnvironment{tikzpicture} + +%!tikz preamble begin +\usepackage{circuitikz} +\usetikzlibrary{angles, arrows.meta, quotes, calc, babel, fadings,quotes} +\usetikzlibrary{backgrounds} +\usetikzlibrary{intersections} +\usetikzlibrary{through,calc,decorations.markings,positioning,angles} +\usepackage{fp} +\usepgflibrary{fixedpointarithmetic} + +%!tikz preamble end + + +\begin{document} +%!tikz source begin +\begin{tikzpicture}[scale=4,transform shape] +\ctikzset{ + logic ports=ieee, + logic ports/scale=1, + % logic ports/fill=lightgray + % Koordinaten für Kreuzpunkte + } + + +% \node (x2) at (0.15,0.2814) {b}; +% \node (x1) at (0.15,0.841) {a}; + + % Ausgangsvariable +% \node (y) at (5.75,0.841-0.2814) {out}; + + % Gatter +% \node[nand port] at (1.5,0.56) (n1) {}; +% \node[nand port] at (4,0.56) (n2) {}; + + +%\draw (0,0) to[grid with coordinates] (7,4); + +\node[nand port] at (1.75,0.56)(nota){}; +\node[nand port] at (1.75,4*0.56)(notb){}; +\node[nand port] at (4.,2.5*0.56)(n2){}; + + +\draw (nota.out) |- (n2.in 2); +\draw (notb.out) |- (n2.in 1); + +\node (a) at (0,0.56) {$a$}; +\node (b) at (0,2.2384) {$b$}; +%\node (out1) at (2.,2) {}; +\node (y) at (5.5,2.5*0.56) {$out$}; + +\coordinate (A) at (0.45,0.841-0.2814); +\fill (A) circle (1.5pt); + +\draw[name path = a1] (A) |- (nota.in 1); +\draw[name path = a2] (A) |- (nota.in 2); +\draw (A) --++ (-.25,0); + + +\coordinate (B) at (0.45,2.2384); +\fill (B) circle (1.5pt); + +\draw (B) |- (notb.in 1); +\draw (B) |- (notb.in 2); +\draw (B) --++ (-.25,0); + + +\draw (nota.out) |- node[below, yshift=-15pt, xshift=5pt]{\small$nota$}(n2.in 2); +\draw (notb.out) |- node[above, yshift=15pt, xshift=5pt]{\small$notb$}(n2.in 1); + + +%\draw[name path = a1](nota.in 1) --++ (-0.25,0)|- (a); +%\draw[name path = a2](nota.in 2) --++ (-0.25,0)|- (a); +%\path[name intersections={of=a1 and a2,by=e}]; +%\fill (e) circle[radius=1pt]; + +%\draw[name path = b1](notb.input 1) --++ (-0.25,0)|- (b); +%\draw[name path = b2](notb.input 2) --++ (-0.25,0)|- (b); +%\path[name intersections={of=b1 and b2,by=e}]; +%\fill (e) circle[radius=1pt]; + +%\draw(nota.output) --++ (0.5,0) --++ (0,0.9)-| ($(n2.input 2)$); +%\draw(notb.output) --++ (0.5,0) --++ (0,-0.9)-| ($(n2.input 1)$); + + +%\draw(n2.output) -- (y); + +\end{tikzpicture} +%!tikz source end + +\end{document} \ No newline at end of file diff --git a/Grafiken/OrANSIStandAlone.tex b/Grafiken/OrANSIStandAlone.tex new file mode 100644 index 0000000..b3b3fda --- /dev/null +++ b/Grafiken/OrANSIStandAlone.tex @@ -0,0 +1,50 @@ +%!tikz editor 1.0 +\documentclass{article} +\usepackage{tikz} +\usepackage[graphics, active, tightpage]{preview} +\usepackage{circuitikz} +\PreviewEnvironment{tikzpicture} + +%!tikz preamble begin +%\usetikzlibrary{circuits.logic.US, positioning} +\usepackage{circuitikz} +\usepackage[utf8]{inputenc} +%!tikz preamble end + + +\begin{document} +%!tikz source begin +\begin{tikzpicture}[scale=6, transform shape] +\tikzstyle{branch}=[fill,shape=circle,minimum size=1pt,inner sep=pt] + + +\ctikzset{ + logic ports=ieee, + logic ports/scale=1, +% logic ports/fill=lightgray + % Koordinaten für Kreuzpunkte + } + +\node[not port] at (1.25,1)(nota){}; +\node[not port] at (1.25,3)(notb){}; +\node[nand port] at (4,2)(n2){}; + +\node (a) at (0,1) {$a$}; +\node (b) at (0,3) {$b$}; +\node (out1) at (2.5,2) {}; +\node (y) at (6,2) {$out$}; + + +\draw(nota.in) -- (a); +\draw(notb.in) -- (b); +\draw(nota.out) --++ (0.5,0) --++ (0,0.72)-| ($(n2.in 2)$); +\draw(notb.out) --++ (0.5,0) --++ (0,-0.72)-| ($(n2.in 1)$); +%\draw(n2.input 2) -| ($(out1)$); + +\draw(n2.out) -- (y); + + +\end{tikzpicture} +%!tikz source end + +\end{document} \ No newline at end of file diff --git a/Grafiken/XORANSI.tex b/Grafiken/XORANSI.tex new file mode 100644 index 0000000..53a5d79 --- /dev/null +++ b/Grafiken/XORANSI.tex @@ -0,0 +1,50 @@ +\begin{tikzpicture}[scale=1,transform shape] +\ctikzset{ + logic ports=ieee, + logic ports/scale=1 + } + +\node[nand port] at (1.75,0.56)(not1){N2}; +\node[nand port] at (1.75,4*0.56)(not2){N1}; + +\node[nand port] at (4.5,0.56)(nanda){N4}; +\node[nand port] at (4.5,4*0.56)(nandb){N3}; +\node[nand port] at (6.75,2.5*0.56)(n2){N5}; + +\draw (nanda.out) |- (n2.in 2); +\draw (nandb.out) |- (n2.in 1); + +\node (a) at (0,0.56) {$b$}; +\node (b) at (0,2.2384) {$a$}; +%\node (out1) at (2.,2) {}; +\node (y) at (8.25,2.5*0.56) {$out$}; + +\coordinate (A) at (0.65,0.841-0.2814); +\fill (A) circle (1.5pt); + +\draw[name path = a1] (A) |- (not1.in 1); +\draw[name path = a2] (A) |- (not1.in 2); +\draw (A) --++ (-.45,0); + + + +\coordinate (B) at (0.65,2.2384); +\fill (B) circle (1.5pt); + +\draw (B) |- (not2.in 1); +\draw (B) |- (not2.in 2); +\draw (B) --++ (-.45,0); + +\draw (not1.out) |- (nanda.in 2); +\draw (not2.out) |- (nandb.in 1); + +\draw[name path = b1](B) --++ (-7pt,0) --++ (0,-20pt) --++ (75pt,0)|- (nanda.in 1); +\draw[name path = a1](A) --++ (-7pt,0) --++ (0,20pt) --++ (70pt,0)|- (nandb.in 2); + +\path[name intersections={of=a1 and b1, by=e}]; +\fill[color=white] (e) circle[radius=0.16\crossing];% erase plain crossing +\draw (e) node[jump crossing]{}; + +%\draw(n2.output) -- (y); + +\end{tikzpicture} \ No newline at end of file diff --git a/IEC/AndIEC.pdf b/IEC/AndIEC.pdf new file mode 100644 index 0000000..8537307 --- /dev/null +++ b/IEC/AndIEC.pdf @@ -0,0 +1 @@ +Not Found \ No newline at end of file diff --git a/IEC/AndIEC.png b/IEC/AndIEC.png new file mode 100644 index 0000000..8537307 --- /dev/null +++ b/IEC/AndIEC.png @@ -0,0 +1 @@ +Not Found \ No newline at end of file diff --git a/IEC/AndIEC.tex b/IEC/AndIEC.tex new file mode 100644 index 0000000..c3f2c43 --- /dev/null +++ b/IEC/AndIEC.tex @@ -0,0 +1,40 @@ +%!tikz editor 1.0 +\documentclass{article} +\usepackage{tikz} +\usepackage[graphics, active, tightpage]{preview} +\usepackage{circuitikz} +\PreviewEnvironment{tikzpicture} + +%!tikz preamble begin +\usetikzlibrary{circuits.logic.IEC, positioning} +\usepackage[utf8]{inputenc} +%!tikz preamble end + + +\begin{document} +%!tikz source begin +\begin{tikzpicture}[scale=6, transform shape,circuit logic IEC] +\tikzstyle{branch}=[fill,shape=circle,minimum size=1pt,inner sep=pt] + +\node[nand gate] at (1,1)(n1){}; +\node[nand gate] at (3,1)(n2){}; + +\node (a) at (0,1.165) {$a$}; +\node (b) at (0,0.825) {$b$}; +\node (out1) at (2.25,1) {}; +\node (y) at (4.25,1) {$out$}; + + +\draw(n1.input 1) -- (a); +\draw(n1.input 2) -- (b); +\draw(n2.input 1) -| ($(out1)$); +\draw(n2.input 2) -| ($(out1)$); + +\fill (out1) circle (1pt); +\draw(n1.output) --($(out1)$); +\draw(n2.output) -- (y); + +\end{tikzpicture} +%!tikz source end + +\end{document} \ No newline at end of file diff --git a/IEC/NotIEC.pdf b/IEC/NotIEC.pdf new file mode 100644 index 0000000..8537307 --- /dev/null +++ b/IEC/NotIEC.pdf @@ -0,0 +1 @@ +Not Found \ No newline at end of file diff --git a/IEC/NotIEC.png b/IEC/NotIEC.png new file mode 100644 index 0000000..8537307 --- /dev/null +++ b/IEC/NotIEC.png @@ -0,0 +1 @@ +Not Found \ No newline at end of file diff --git a/IEC/NotIEC.tex b/IEC/NotIEC.tex new file mode 100644 index 0000000..88f799a --- /dev/null +++ b/IEC/NotIEC.tex @@ -0,0 +1,32 @@ +%!tikz editor 1.0 +\documentclass{article} +\usepackage{tikz} +\usepackage[graphics, active, tightpage]{preview} +\usepackage{circuitikz} +\PreviewEnvironment{tikzpicture} + +%!tikz preamble begin +\usetikzlibrary{circuits.logic.IEC, positioning} +\usepackage[utf8]{inputenc} +%!tikz preamble end + + +\begin{document} +%!tikz source begin +\begin{tikzpicture}[scale=1, transform shape,circuit logic IEC] +\tikzstyle{branch}=[fill,shape=circle,minimum size=3pt,inner sep=0pt] +\node[nand gate] at (1,1)(n1){}; + +\node (a) at (0,1.165) {$a$}; +\node (b) at (0,0.825) {$b$}; +\node (y) at (2.25,1) {$out$}; + + +\draw(n1.input 1) -- (a); +\draw(n1.input 2) -- (b); +\draw(n1.output) -- (y); + +\end{tikzpicture} +%!tikz source end + +\end{document} \ No newline at end of file diff --git a/IEC/OrIEC.pdf b/IEC/OrIEC.pdf new file mode 100644 index 0000000..8537307 --- /dev/null +++ b/IEC/OrIEC.pdf @@ -0,0 +1 @@ +Not Found \ No newline at end of file diff --git a/IEC/OrIEC.png b/IEC/OrIEC.png new file mode 100644 index 0000000..8537307 --- /dev/null +++ b/IEC/OrIEC.png @@ -0,0 +1 @@ +Not Found \ No newline at end of file diff --git a/IEC/OrIEC.tex b/IEC/OrIEC.tex new file mode 100644 index 0000000..7abbf51 --- /dev/null +++ b/IEC/OrIEC.tex @@ -0,0 +1,22 @@ +\begin{tikzpicture}[scale=1, transform shape,circuit logic IEC] +\tikzstyle{branch}=[fill,shape=circle,minimum size=1pt,inner sep=pt] + +\node[not gate] at (1,1)(nota){}; +\node[not gate] at (1,3)(notb){}; +\node[nand gate] at (3,2)(n2){}; + +\node (a) at (0,1) {$a$}; +\node (b) at (0,3) {$b$}; +\node (out1) at (2.,2) {}; +\node (y) at (4.25,2) {$out$}; + + +\draw(nota.input) -- (a); +\draw(notb.input) -- (b); +\draw(nota.output) --++ (0.5,0) --++ (0,0.825)-| ($(n2.input 2)$); +\draw(notb.output) --++ (0.5,0) --++ (0,-0.825)-| ($(n2.input 1)$); +%\draw(n2.input 2) -| ($(out1)$); + +\draw(n2.output) -- (y); + +\end{tikzpicture} diff --git a/IEC/OrIECStandAlone.tex b/IEC/OrIECStandAlone.tex new file mode 100644 index 0000000..e392477 --- /dev/null +++ b/IEC/OrIECStandAlone.tex @@ -0,0 +1,40 @@ +%!tikz editor 1.0 +\documentclass{article} +\usepackage{tikz} +\usepackage[graphics, active, tightpage]{preview} +\usepackage{circuitikz} +\PreviewEnvironment{tikzpicture} + +%!tikz preamble begin +\usetikzlibrary{circuits.logic.IEC, positioning} +\usepackage[utf8]{inputenc} +%!tikz preamble end + + +\begin{document} +%!tikz source begin +\begin{tikzpicture}[scale=1, transform shape,circuit logic IEC] +\tikzstyle{branch}=[fill,shape=circle,minimum size=1pt,inner sep=pt] + +\node[not gate] at (1,1)(nota){}; +\node[not gate] at (1,3)(notb){}; +\node[nand gate] at (3,2)(n2){}; + +\node (a) at (0,1) {$a$}; +\node (b) at (0,3) {$b$}; +\node (out1) at (2.,2) {}; +\node (y) at (4.25,2) {$out$}; + + +\draw(nota.input) -- (a); +\draw(notb.input) -- (b); +\draw(nota.output) --++ (0.5,0) --++ (0,0.825)-| ($(n2.input 2)$); +\draw(notb.output) --++ (0.5,0) --++ (0,-0.825)-| ($(n2.input 1)$); +%\draw(n2.input 2) -| ($(out1)$); + +\draw(n2.output) -- (y); + +\end{tikzpicture} +%!tikz source end + +\end{document} \ No newline at end of file diff --git a/Tools/CPU-Design.odg b/Tools/CPU-Design.odg new file mode 100644 index 0000000..8537307 --- /dev/null +++ b/Tools/CPU-Design.odg @@ -0,0 +1 @@ +Not Found \ No newline at end of file diff --git a/Tools/CPU.odg b/Tools/CPU.odg new file mode 100644 index 0000000..8537307 --- /dev/null +++ b/Tools/CPU.odg @@ -0,0 +1 @@ +Not Found \ No newline at end of file diff --git a/Tools/CSE390b_Week5_Lecture9.pdf b/Tools/CSE390b_Week5_Lecture9.pdf new file mode 100644 index 0000000..8537307 --- /dev/null +++ b/Tools/CSE390b_Week5_Lecture9.pdf @@ -0,0 +1 @@ +Not Found \ No newline at end of file diff --git a/Tools/Digitaltechnik Grundlagen, VHDL, FPGAs, Mikrocontroller by Winfried Gehrke, Marco Winzker, Klaus Urbanski, Roland Woitowitz.pdf b/Tools/Digitaltechnik Grundlagen, VHDL, FPGAs, Mikrocontroller by Winfried Gehrke, Marco Winzker, Klaus Urbanski, Roland Woitowitz.pdf new file mode 100644 index 0000000..8537307 --- /dev/null +++ b/Tools/Digitaltechnik Grundlagen, VHDL, FPGAs, Mikrocontroller by Winfried Gehrke, Marco Winzker, Klaus Urbanski, Roland Woitowitz.pdf @@ -0,0 +1 @@ +Not Found \ No newline at end of file diff --git a/Tools/Digitaltechnik by Klaus Fricke.pdf b/Tools/Digitaltechnik by Klaus Fricke.pdf new file mode 100644 index 0000000..8537307 --- /dev/null +++ b/Tools/Digitaltechnik by Klaus Fricke.pdf @@ -0,0 +1 @@ +Not Found \ No newline at end of file diff --git a/Tools/Nand2Tetris.odt b/Tools/Nand2Tetris.odt new file mode 100644 index 0000000..8537307 --- /dev/null +++ b/Tools/Nand2Tetris.odt @@ -0,0 +1 @@ +Not Found \ No newline at end of file diff --git a/Tools/P5CPU.odt b/Tools/P5CPU.odt new file mode 100644 index 0000000..8537307 --- /dev/null +++ b/Tools/P5CPU.odt @@ -0,0 +1 @@ +Not Found \ No newline at end of file diff --git a/Tools/P5CPU.pdf b/Tools/P5CPU.pdf new file mode 100644 index 0000000..8537307 --- /dev/null +++ b/Tools/P5CPU.pdf @@ -0,0 +1 @@ +Not Found \ No newline at end of file diff --git a/Tools/VHDL_QuickRef.pdf b/Tools/VHDL_QuickRef.pdf new file mode 100644 index 0000000..8537307 --- /dev/null +++ b/Tools/VHDL_QuickRef.pdf @@ -0,0 +1 @@ +Not Found \ No newline at end of file diff --git a/Tools/VorlageMinipage.tex b/Tools/VorlageMinipage.tex new file mode 100644 index 0000000..176445b --- /dev/null +++ b/Tools/VorlageMinipage.tex @@ -0,0 +1,11 @@ +\begin{minipage}{.5\textwidth} +\end{minipage}% This must go next to `\end{minipage}` +\begin{minipage}{.5\textwidth} +\end{minipage} + + +\begin{minipage}[t]{0.5\linewidth} +\end{minipage}\hfill +\raisebox{-0.5\height}{ +\begin{minipage}[t]{0.4\linewidth} +\end{minipage}} \ No newline at end of file diff --git a/Tools/convert2svg.sh b/Tools/convert2svg.sh new file mode 100644 index 0000000..8537307 --- /dev/null +++ b/Tools/convert2svg.sh @@ -0,0 +1 @@ +Not Found \ No newline at end of file diff --git a/Tools/lec08_HackML.pdf b/Tools/lec08_HackML.pdf new file mode 100644 index 0000000..8537307 --- /dev/null +++ b/Tools/lec08_HackML.pdf @@ -0,0 +1 @@ +Not Found \ No newline at end of file diff --git a/Tools/workbook.pdf b/Tools/workbook.pdf new file mode 100644 index 0000000..8537307 --- /dev/null +++ b/Tools/workbook.pdf @@ -0,0 +1 @@ +Not Found \ No newline at end of file