\section{Not}

\begin{minipage}[t]{0.5\linewidth} 
    \begin{minted}{vhdl}
/**
 * Not gate:
 * out = not in
 */

CHIP Not {
    IN in;
    OUT out;

    PARTS:
    Nand(a=in,b=in,out=out);
    // Put your code here:
}
\end{minted}
    \end{minipage}\hfill
%\raisebox{\dimexpr \ht\strutbox-\totalheight}{
\raisebox{-0.5\height}{
\begin{minipage}[t]{0.4\linewidth} 
    \begin{figure}[H]
\centering
\include{Grafiken/NotANSI}\caption{Not(ANSI)}
\label{fig:NotANSI}
\end{figure}
\end{minipage}}

%%%%%%%%%%%%%%%%%%

\begin{minipage}[t]{0.5\linewidth} 
\begin{table}[H]
    \centering
    \begin{tabular}{c|c}
         in&  $\neg$ in\\ \hline
         0&   1\\
         1&   0\\
\end{tabular}
\label{tab:not}
\end{table}
\end{minipage}\hfill
\raisebox{-0.5\height}{
\begin{minipage}[t]{0.4\linewidth} 
\begin{figure}[H]
\centering
\includegraphics{IEC/NotIEC.pdf}\caption{Not(IEC)}
\label{fig:NotIEC}
\end{figure}

\end{minipage}}

\begin{figure}
    \centering
    \includegraphics[width=0.25\linewidth]{Grafiken/NotTransistor.png}
    \caption{Enter Caption}
    \label{fig:enter-label}
\end{figure}
%%%%%%%%%%%%%%%%%%

