Das erste richtige Bild mit circuittikz

Nand2tetris_prj/Nand.vhdl

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+library IEEE;
+use IEEE.STD_LOGIC_1164.ALL;
+
+entity NAND_GATE is
+  Port ( A : in  STD_LOGIC;
+         B : in  STD_LOGIC;
+         O : out  STD_LOGIC);
+end NAND_GATE;
+
+architecture Behavioral of NAND_GATE is
+begin
+  O <= not (A and B);
+end Behavioral;