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This commit is contained in:
Sven Riwoldt
2025-04-05 08:00:04 +02:00
parent 7610af6234
commit 3e40d5c61c
75 changed files with 22726 additions and 301 deletions
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50
tools/builtInChips/ALU.hdl
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@@ -1,36 +1,30 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtIn/ALU.hdl
// File name: tools/builtInChips/ALU.hdl
/**
* The ALU. Computes one of the following functions:
* x+y, x-y, y<>x, 0, 1, -1, x, y, -x, -y, !x, !y,
* x+1, y+1, x-1, y-1, x&y, x|y on two 16-bit inputs.
* Which function to compute is determined by 6 input bits
* denoted zx, nx, zy, ny, f, no.
* The computed function's value is called "out".
* In addition to computing out, the ALU computes two
* 1-bit outputs called zr and ng:
* if out == 0, zr = 1; otherwise zr = 0;
* If out < 0, ng = 1; otherwise ng = 0.
* The 6-bit combinations (zx,nx,zy,ny,f,no) and
* their effect are documented in the book.
* ALU (Arithmetic Logic Unit):
* Computes out = one of the following functions:
* 0, 1, -1,
* x, y, !x, !y, -x, -y,
* x + 1, y + 1, x - 1, y - 1,
* x + y, x - y, y - x,
* x & y, x | y
* on the 16-bit inputs x, y,
* according to the input bits zx, nx, zy, ny, f, no.
* In addition, computes the output bits:
* zr = (out == 0, 1, 0)
* ng = (out < 0, 1, 0)
*/
// Implementation: the ALU manipulates the x and y
// inputs and then operates on the resulting values,
// as follows:
// if (zx == 1) sets x = 0 // 16-bit constant
// if (nx == 1) sets x = ~x // bitwise "not"
// if (zy == 1) sets y = 0 // 16-bit constant
// if (ny == 1) sets y = ~y // bitwise "not"
// if (f == 1) sets out = x + y // integer 2's-complement addition
// if (f == 0) sets out = x & y // bitwise And
// if (no == 1) sets out = ~out // bitwise Not
// if (out == 0) sets zr = 1
// if (out < 0) sets ng = 1
// Implementation: Manipulates the x and y inputs
// and operates on the resulting values, as follows:
// if (zx == 1) sets x = 0 // 16-bit constant
// if (nx == 1) sets x = !x // bitwise not
// if (zy == 1) sets y = 0 // 16-bit constant
// if (ny == 1) sets y = !y // bitwise not
// if (f == 1) sets out = x + y // integer 2's complement addition
// if (f == 0) sets out = x & y // bitwise and
// if (no == 1) sets out = !out // bitwise not
CHIP ALU {

18
tools/builtInChips/ARegister.hdl
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtIn/ARegister.hdl
// File name: tools/builtInChips/ARegister.hdl
/**
* A 16-Bit register called "A Register".
* If load[t-1]=1 then out[t] = in[t-1]
* else out does not change (out[t] = out[t-1])
* A 16-bit register named ARegister with the same functionality
* of the Register chip:
* If load is asserted, the register's value is set to in;
* Otherwise, the register maintains its current value.
* out(t+1) = (load(t), in(t), out(t))
*
* This built-in chip implementation has the side effect of
* providing a GUI representation of a 16-bit register
* called "A register" (typically used to store an address).
* This built-in implementation has a visualization side effect.
*/
CHIP ARegister {
CHIP ARegister {
IN in[16], load;
OUT out[16];

10
tools/builtInChips/Add16.hdl
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtIn/Add16.hdl
/*
* Adds two 16-bit values.
// File name: tools/builtInChips/Add16.hdl
/**
* 16-bit adder: Adds two 16-bit two's complement values.
* The most significant carry bit is ignored.
*/
CHIP Add16 {
CHIP Add16 {
IN a[16], b[16];
OUT out[16];

7
tools/builtInChips/And.hdl
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@@ -1,12 +1,11 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtIn/And.hdl
// File name: tools/builtInChips/And.hdl
/**
* And gate: out = 1 if {a == 1 and b == 1}, 0 otherwise
* And gate:
* out = (((a == 1) && (b == 1))), 1, 0)
*/
CHIP And {
IN a, b;

7
tools/builtInChips/And16.hdl
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@@ -1,12 +1,11 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtIn/And16.hdl
// File name: tools/builtInChips/And16.hdl
/**
* 16-bit-wise And gate: for i = 0..15: out[i] = a[i] and b[i]
* 16-bit bitwise And gate:
* out[i] = And(a[i],b[i]) for i = 0..15
*/
CHIP And16 {
IN a[16], b[16];

13
tools/builtInChips/Bit.hdl
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtIn/Bit.hdl
// File name: tools/builtInChips/Bit.hdl
/**
* 1-bit register.
* If load[t] == 1 then out[t+1] = in[t]
* else out[t+1] = out[t] (no change)
* 1-bit register:
* If load is asserted, the register's value is set to in;
* Otherwise, the register maintains its current value.
* out(t+1) = (load(t), in(t), out(t))
*/
CHIP Bit {
CHIP Bit {
IN in, load;
OUT out;

4
tools/builtInChips/DFF.hdl
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@@ -1,13 +1,11 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtIn/DFF.hdl
// File name: tools/builtInChips/DFF.hdl
/**
* Data Flip-flop: out(t) = in(t-1)
* where t is the current time unit, or clock cycle.
*/
CHIP DFF {
IN in;

10
tools/builtInChips/DMux.hdl
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@@ -1,15 +1,11 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtIn/DMux.hdl
// File name: tools/builtInChips/DMux.hdl
/**
* Dmultiplexor.
* {a,b} = {in,0} if sel == 0
* {0,in} if sel == 1
* Demultiplexor:
* [a, b] = ((sel == 0), [in, 0], [0, in])
*/
CHIP DMux {
IN in, sel;

17
tools/builtInChips/DMux4Way.hdl
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtIn/DMux4Way.hdl
// File name: tools/builtInChips/DMux4Way.hdl
/**
* 4-way demultiplexor.
* {a,b,c,d} = {in,0,0,0} if sel == 00
* {0,in,0,0} if sel == 01
* {0,0,in,0} if sel == 10
* {0,0,0,in} if sel == 11
* 4-way demultiplexor:
* [a, b, c, d] = [in, 0, 0, 0] if sel == 00
* [0, in, 0, 0] if sel == 01
* [0, 0, in, 0] if sel == 10
* [0, 0, 0, in] if sel == 11
*/
CHIP DMux4Way {
CHIP DMux4Way {
IN in, sel[2];
OUT a, b, c, d;

17
tools/builtInChips/DMux8Way.hdl
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtIn/DMux8Way.hdl
// File name: tools/builtInChips/DMux8Way.hdl
/**
* 8-way demultiplexor.
* {a,b,c,d,e,f,g,h} = {in,0,0,0,0,0,0,0} if sel == 000
* {0,in,0,0,0,0,0,0} if sel == 001
* etc.
* {0,0,0,0,0,0,0,in} if sel == 111
* 8-way demultiplexor:
* [a, b, c, d, e, f, g, h] = [in, 0, 0, 0, 0, 0, 0, 0] if sel == 000
* [0, in, 0, 0, 0, 0, 0, 0] if sel == 001
* ...
* [0, 0, 0, 0, 0, 0, 0, in] if sel == 111
*/
CHIP DMux8Way {
CHIP DMux8Way {
IN in, sel[3];
OUT a, b, c, d, e, f, g, h;

22
tools/builtInChips/DRegister.hdl
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// This file is part of the materials accompanying the book
// "The Elements of Computing Systems" by Nisan and Schocken,
// MIT Press. Book site: www.idc.ac.il/tecs
// File name: tools/builtIn/DRegister.hdl
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/DRegister.hdl
/**
* A 16-Bit register called "D Register".
* If load[t-1]=1 then out[t] = in[t-1]
* else out does not change (out[t] = out[t-1])
* A 16-bit register named DRegister with the same functionality
* of the Register chip:
* If load is asserted, the register's value is set to in;
* Otherwise, the register maintains its current value.
* out(t+1) = (load(t), in(t), out(t))
*
* This built-in chip implementation has the side effect of
* providing a GUI representation of a 16-bit register
* called "D register" (typically used to store data).
* This built-in implementation has a visualization side effect.
*/
CHIP DRegister {
IN in[16], load;

9
tools/builtInChips/FullAdder.hdl
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtIn/FullAdder.hdl
// File name: tools/builtInChips/FullAdder.hdl
/**
* Full adder. Computes sum, the least significant bit of
* a + b + c, and carry, the most significant bit of a + b + c.
* Computes the sum of three bits.
*/
CHIP FullAdder {
CHIP FullAdder {
IN a, b, c;
OUT sum, // LSB of a + b + c

9
tools/builtInChips/HalfAdder.hdl
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@@ -1,14 +1,11 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtIn/HalfAdder.hdl
// File name: tools/builtInChips/HalfAdder.hdl
/**
* Half adder. Computes sum, the least significnat bit of a + b,
* and carry, the most significnat bit of a + b.
* Computes the sum of two bits.
*/
CHIP HalfAdder {
CHIP HalfAdder {
IN a, b;
OUT sum, // LSB of a + b

11
tools/builtInChips/Inc16.hdl
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtIn/Inc16.hdl
// File name: tools/builtInChips/Inc16.hdl
/**
* 16-bit incrementer. out = in + 1 (16-bit addition).
* Overflow is neither detected nor handled.
* 16-bit incrementer:
* out = in + 1
*/
CHIP Inc16 {
CHIP Inc16 {
IN in[16];
OUT out[16];
BUILTIN Inc16;
}

16
tools/builtInChips/Keyboard.hdl
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@@ -1,23 +1,17 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtIn/Keyboard.hdl
// File name: tools/builtInChips/Keyboard.hdl
/**
* The keyboard (memory map).
* Outputs the code of the currently pressed key.
* Outputs the character code of the currently pressed key,
* or 0 if no key is pressed.
*
* The built-in chip implementation has two side effects supplied
* by the simulator. First, the keyboard memory map is continuously
* being refreshed from the physical keyboard unit. Second, it
* displays a keyboard icon and data entry GUI.
* This built-in implementation has a visualization side effect.
*/
CHIP Keyboard {
OUT out[16]; // The ASCII code of the pressed key,
// or 0 if no key is currently pressed,
// or one the special codes listed in Figure 5.5.
OUT out[16];
BUILTIN Keyboard;
}

9
tools/builtInChips/Mux.hdl
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@@ -1,13 +1,12 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtIn/Mux.hdl
// File name: tools/builtInChips/Mux.hdl
/**
* Multiplexor. If sel == 1 then out = b else out = a.
* Multiplexor:
* out = ((sel == 0), a, b)
*/
CHIP Mux {
CHIP Mux {
IN a, b, sel;
OUT out;

9
tools/builtInChips/Mux16.hdl
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtIn/Mux16.hdl
// File name: tools/builtInChips/Mux16.hdl
/**
* 16 bit multiplexor. If sel == 1 then out = b else out = a.
* 16-bit multiplexor:
* out[i] = ((sel == 0), a[i], b[i]) for i = 0..15
*/
CHIP Mux16 {
CHIP Mux16 {
IN a[16], b[16], sel;
OUT out[16];

7
tools/builtInChips/Mux4Way16.hdl
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtIn/Mux4Way16.hdl
// File name: tools/builtInChips/Mux4Way16.hdl
/**
* 4-way 16-bit multiplexor.
* 4-way 16-bit multiplexor:
* out = a if sel == 00
* b if sel == 01
* c if sel == 10
* d if sel == 11
*/
CHIP Mux4Way16 {
IN a[16], b[16], c[16], d[16], sel[2];

11
tools/builtInChips/Mux8Way16.hdl
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtIn/Mux8Way16.hdl
// File name: tools/builtInChips/Mux8Way16.hdl
/**
* 8-way 16-bit multiplexor.
* 8-way 16-bit multiplexor:
* out = a if sel == 000
* b if sel == 001
* etc.
* ...
* h if sel == 111
*/
CHIP Mux8Way16 {
CHIP Mux8Way16 {
IN a[16], b[16], c[16], d[16],
e[16], f[16], g[16], h[16],

7
tools/builtInChips/Nand.hdl
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtIn/Nand.hdl
// File name: tools/builtInChips/Nand.hdl
/**
* Nand gate: out = a Nand b.
* Nand gate:
* out = (((a == 1) && (b == 1))), 0, 1)
*/
CHIP Nand {
IN a, b;

11
tools/builtInChips/Not.hdl
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@@ -1,13 +1,12 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtIn/Not.hdl
/**
* Not gate: out = not in
// File name: tools/builtInChips/Not.hdl
/**
* Not gate:
* out = ((in == 0), 1, 0)
*/
CHIP Not {
CHIP Not {
IN in;
OUT out;

9
tools/builtInChips/Not16.hdl
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@@ -1,13 +1,12 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtIn/Not16.hdl
// File name: tools/builtInChips/Not16.hdl
/**
* 16-bit Not gate: for i = 0..15: out[i] = not in[i]
* 16-bit Not gate:
* out[i] = ((in[i] == 0), 1, 0) for i = 0..15
*/
CHIP Not16 {
CHIP Not16 {
IN in[16];
OUT out[16];

9
tools/builtInChips/Or.hdl
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtIn/Or.hdl
// File name: tools/builtInChips/Or.hdl
/**
/**
* Or gate:
* out = (((a == 1) || (b == 1))), 1, 0)
*/
*/
CHIP Or {
IN a, b;
OUT out;

9
tools/builtInChips/Or16.hdl
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtIn/Or16.hdl
// File name: tools/builtInChips/Or16.hdl
/**
* 16-bit bitwise Or gate: for i = 0..15 out[i] = a[i] or b[i].
* 16-bit bitwise Or gate:
* out[i] = (a[i] Or b[i]) for i = 0..15
*/
CHIP Or16 {
CHIP Or16 {
IN a[16], b[16];
OUT out[16];

9
tools/builtInChips/Or8Way.hdl
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@@ -1,13 +1,12 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtIn/Or8Way.hdl
// File name: tools/builtInChips/Or8Way.hdl
/**
/**
* 8-way Or gate:
* out = in[0] Or in[1] Or ... Or in[7]
*/
*/
CHIP Or8Way {
IN in[8];
OUT out;

15
tools/builtInChips/PC.hdl
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@@ -1,17 +1,18 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtIn/PC.hdl
// File name: tools/builtInChips/PC.hdl
/**
* 16-bit counter with load and reset controls.
* A 16-bit counter with increment, load, and reset modes.
* if (inc(t) == 1) out(t+1) = out(t) + 1
* else if (load(t) == 1) out(t+1) = in(t)
* else if (reset(t) == 1) out(t+1) = 0
* else out(t+1) = out(t).
*
* If reset(t-1) then out(t) = 0
* else if load(t-1) then out(t) = in(t-1)
* else if inc(t-1) then out(t) = out(t-1) + 1 (integer addition)
* else out(t) = out(t-1)
* To select a mode, assert the relevant control bit,
* and de-assert the other two bits.
*/
CHIP PC {
IN in[16], load, inc, reset;

18
tools/builtInChips/RAM16K.hdl
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@@ -1,20 +1,14 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtIn/RAM16K.hdl
// File name: tools/builtInChips/RAM16K.hdl
/**
* Memory of 16K registers, each 16-bit wide.
* The chip facilitates read and write operations, as follows:
* Read: out(t) = RAM16K[address(t)](t)
* Write: If load(t-1) then RAM16K[address(t-1)](t) = in(t-1)
* In words: the chip always outputs the value stored at the memory
* location specified by address. If load=1, the in value is loaded
* into the memory location specified by address. This value becomes
* available through the out output starting from the next time step.
* Memory of 16K 16-bit registers.
* If load is asserted, the value of the register selected by
* address is set to in; Otherwise, the value does not change.
* The value of the selected register is emitted by out.
*/
CHIP RAM16K {
CHIP RAM16K {
IN in[16], load, address[14];
OUT out[16];

18
tools/builtInChips/RAM4K.hdl
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtIn/RAM4K.hdl
// File name: tools/builtInChips/RAM4K.hdl
/**
* Memory of 4K registers, each 16-bit wide.
* The chip facilitates read and write operations, as follows:
* Read: out(t) = RAM4K[address(t)](t)
* Write: If load(t-1) then RAM4K[address(t-1)](t) = in(t-1)
* In words: the chip always outputs the value stored at the memory
* location specified by address. If load == 1, the in value is loaded
* into the memory location specified by address. This value becomes
* available through the out output starting from the next time step.
* Memory of 4K 16-bit registers.
* If load is asserted, the value of the register selected by
* address is set to in; Otherwise, the value does not change.
* The value of the selected register is emitted by out.
*/
CHIP RAM4K {
CHIP RAM4K {
IN in[16], load, address[12];
OUT out[16];

18
tools/builtInChips/RAM512.hdl
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@@ -1,20 +1,14 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtIn/RAM512.hdl
// File name: tools/builtInChips/RAM512.hdl
/**
* Memory of 512 registers, each 16-bit wide.
* The chip facilitates read and write operations, as follows:
* Read: out(t) = RAM512[address(t)](t)
* Write: If load(t-1) then RAM512[address(t-1)](t) = in(t-1)
* In words: the chip always outputs the value stored at the memory
* location specified by address. If load == 1, the in value is loaded
* into the memory location specified by address. This value becomes
* available through the out output starting from the next time step.
* Memory of 512 16-bit registers.
* If load is asserted, the value of the register selected by
* address is set to in; Otherwise, the value does not change.
* The value of the selected register is emitted by out.
*/
CHIP RAM512 {
CHIP RAM512 {
IN in[16], load, address[9];
OUT out[16];

18
tools/builtInChips/RAM64.hdl
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtIn/RAM64.hdl
// File name: tools/builtInChips/RAM64.hdl
/**
* Memory of 64 registers, each 16-bit wide.
* The chip facilitates read and write operations, as follows:
* Read: out(t) = RAM64[address(t)](t)
* Write: If load(t-1) then RAM64[address(t-1)](t) = in(t-1)
* In words: the chip always outputs the value stored at the memory
* location specified by address. If load == 1, the in value is loaded
* into the memory location specified by address. This value becomes
* available through the out output starting from the next time step.
* Memory of sixty four 16-bit registers.
* If load is asserted, the value of the register selected by
* address is set to in; Otherwise, the value does not change.
* The value of the selected register is emitted by out.
*/
CHIP RAM64 {
CHIP RAM64 {
IN in[16], load, address[6];
OUT out[16];

18
tools/builtInChips/RAM8.hdl
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@@ -1,20 +1,14 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtIn/RAM8.hdl
// File name: tools/builtInChips/RAM8.hdl
/**
* Memory of 8 registers, each 16-bit wide.
* The chip facilitates read and write operations, as follows:
* Read: out(t) = RAM8[address(t)](t)
* Write: If load(t-1) then RAM8[address(t-1)](t) = in(t-1)
* In words: the chip always outputs the value stored at the memory
* location specified by address. If load == 1, the in value is loaded
* into the memory location specified by address. This value becomes
* available through the out output starting from the next time step.
* Memory of eight 16-bit registers.
* If load is asserted, the value of the register selected by
* address is set to in; Otherwise, the value does not change.
* The value of the selected register is emitted by out.
*/
CHIP RAM8 {
CHIP RAM8 {
IN in[16], load, address[3];
OUT out[16];

27
tools/builtInChips/ROM32K.hdl
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@@ -1,27 +1,22 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtIn/ROM32K.hdl
// File name: tools/builtInChips/ROM32K.hdl
/**
* Read-Only memory (ROM) of 16K registers, each 16-bit wide.
* The chip is designed to facilitate data read, as follows:
* Read-Only memory (ROM) of 32K registers, each 16-bit wide.
* Facilitates data read, as follows:
* out(t) = ROM32K[address(t)](t)
* In words: the chip always outputs the value stored at the
* In words: the chip outputs the value stored at the
* memory location specified by address.
*
* The built-in chip implementation has a GUI side-effect,
* showing an array-like component that displays the ROM's
* contents. The ROM32K chip is supposed to be pre-loaded with
* a machine language program. To that end, the built-in chip
* implementation also knows how to handle the "ROM32K load Xxx"
* script command, where Xxx is the name of a text file containing
* a program written in the Hack machine language. When the
* simulator encounters such a command in a test script, the code
* found in the file is loaded into the simulated ROM32K unit.
* Can be used to serve as the instruction memory of the Hack computer.
* To that end, the built-in chip implementation supports the handling
* of the "ROM32K load Xxx" script command, where Xxx is the name of a
* text file containing a program written in the Hack machine language.
* When the simulator encounters such a command in a test script,
* the code found in the file is loaded into the simulated ROM32K chip.
*/
CHIP ROM32K {
CHIP ROM32K {
IN address[15];
OUT out[16];

13
tools/builtInChips/Register.hdl
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@@ -1,15 +1,14 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtIn/Register.hdl
// File name: tools/builtInChips/Register.hdl
/**
* 16-Bit register.
* If load[t-1]=1 then out[t] = in[t-1]
* else out does not change (out[t] = out[t-1])
* 16-bit register:
* If load is asserted, the register's value is set to in;
* Otherwise, the register maintains its current value.
* out(t+1) = (load(t), in(t), out(t))
*/
CHIP Register {
CHIP Register {
IN in[16], load;
OUT out[16];

18
tools/builtInChips/Screen.hdl
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@@ -1,24 +1,22 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtIn/Screen.hdl
// File name: tools/builtInChips/Screen.hdl
/**
* The Screen (memory map).
* Functions exactly like a 16-bit 8K RAM:
* 1. out(t)=Screen[address(t)](t)
* 2. If load(t-1) then Screen[address(t-1)](t)=in(t-1)
* Same functionality as a 16-bit 8K RAM:
* If load is asserted, the value of the register selected by
* address is set to in; Otherwise, the value does not change.
* The value of the selected register is emitted by out.
*
* The built-in chip implementation has the side effect of continuously
* This built-in implementation has the side effect of continuously
* refreshing a visual 256 by 512 black-and-white screen, simulated
* by the simulator. Each row in the visual screen is represented
* by 32 consecutive 16-bit words, starting at the top left corner
* of the visual screen. Thus the pixel at row r from the top and
* column c from the left (0<=r<=255, 0<=c<=511) reflects the c%16
* bit (counting from LSB to MSB) of the word found in
* Screen[r*32+c/16].
* column c from the left (0<=r<256, 0<=c<512) reflects the c%16
* bit (counting from LSB to MSB) of the word found in Screen[r*32+c/16].
*/
CHIP Screen {
IN in[16], // what to write

9
tools/builtInChips/Xor.hdl
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@@ -1,13 +1,12 @@
// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtIn/Xor.hdl
// File name: tools/builtInChips/Xor.hdl
/**
* Exclusive-or gate: out = !(a == b).
* Exclusive-or gate:
* out = (((a == 0) & (b = 1)) | ((a == 1) & (b = 0)), 1, 0)
*/
CHIP Xor {
CHIP Xor {
IN a, b;
OUT out;