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Sven Riwoldt
2023-03-22 19:51:12 +01:00
commit 4c52d4ba55
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projects/02/.DS_Store vendored Normal file
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| x | y |zx |nx |zy |ny | f |no | out |
| 0000000000000000 | 1111111111111111 | 1 | 0 | 1 | 0 | 1 | 0 | 0000000000000000 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 1 | 1 | 1 | 1 | 0000000000000001 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 1 | 0 | 1 | 0 | 1111111111111111 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 0 | 0 | 0000000000000000 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 0 | 0 | 1111111111111111 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 0 | 1 | 1111111111111111 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 0 | 1 | 0000000000000000 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 1 | 1 | 0000000000000000 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 1 | 1 | 0000000000000001 |
| 0000000000000000 | 1111111111111111 | 0 | 1 | 1 | 1 | 1 | 1 | 0000000000000001 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 1 | 1 | 1 | 0000000000000000 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 1 | 0 | 1111111111111111 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 1 | 0 | 1111111111111110 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 0 | 0 | 1 | 0 | 1111111111111111 |
| 0000000000000000 | 1111111111111111 | 0 | 1 | 0 | 0 | 1 | 1 | 0000000000000001 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 0 | 1 | 1 | 1 | 1111111111111111 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 0 | 0 | 0 | 0 | 0000000000000000 |
| 0000000000000000 | 1111111111111111 | 0 | 1 | 0 | 1 | 0 | 1 | 1111111111111111 |
| 0101101110100000 | 0001111011010010 | 1 | 0 | 1 | 0 | 1 | 0 | 0000000000000000 |
| 0101101110100000 | 0001111011010010 | 1 | 1 | 1 | 1 | 1 | 1 | 0000000000000001 |
| 0101101110100000 | 0001111011010010 | 1 | 1 | 1 | 0 | 1 | 0 | 1111111111111111 |
| 0101101110100000 | 0001111011010010 | 0 | 0 | 1 | 1 | 0 | 0 | 0101101110100000 |
| 0101101110100000 | 0001111011010010 | 1 | 1 | 0 | 0 | 0 | 0 | 0001111011010010 |
| 0101101110100000 | 0001111011010010 | 0 | 0 | 1 | 1 | 0 | 1 | 1010010001011111 |
| 0101101110100000 | 0001111011010010 | 1 | 1 | 0 | 0 | 0 | 1 | 1110000100101101 |
| 0101101110100000 | 0001111011010010 | 0 | 0 | 1 | 1 | 1 | 1 | 1010010001100000 |
| 0101101110100000 | 0001111011010010 | 1 | 1 | 0 | 0 | 1 | 1 | 1110000100101110 |
| 0101101110100000 | 0001111011010010 | 0 | 1 | 1 | 1 | 1 | 1 | 0101101110100001 |
| 0101101110100000 | 0001111011010010 | 1 | 1 | 0 | 1 | 1 | 1 | 0001111011010011 |
| 0101101110100000 | 0001111011010010 | 0 | 0 | 1 | 1 | 1 | 0 | 0101101110011111 |
| 0101101110100000 | 0001111011010010 | 1 | 1 | 0 | 0 | 1 | 0 | 0001111011010001 |
| 0101101110100000 | 0001111011010010 | 0 | 0 | 0 | 0 | 1 | 0 | 0111101001110010 |
| 0101101110100000 | 0001111011010010 | 0 | 1 | 0 | 0 | 1 | 1 | 0011110011001110 |
| 0101101110100000 | 0001111011010010 | 0 | 0 | 0 | 1 | 1 | 1 | 1100001100110010 |
| 0101101110100000 | 0001111011010010 | 0 | 0 | 0 | 0 | 0 | 0 | 0001101010000000 |
| 0101101110100000 | 0001111011010010 | 0 | 1 | 0 | 1 | 0 | 1 | 0101111111110010 |

37
projects/02/ALU-nostat.out Normal file
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| x | y |zx |nx |zy |ny | f |no | out |
| 0000000000000000 | 1111111111111111 | 1 | 0 | 1 | 0 | 1 | 0 | 0000000000000000 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 1 | 1 | 1 | 1 | 0000000000000001 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 1 | 0 | 1 | 0 | 1111111111111111 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 0 | 0 | 0000000000000000 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 0 | 0 | 1111111111111111 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 0 | 1 | 1111111111111111 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 0 | 1 | 0000000000000000 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 1 | 1 | 0000000000000000 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 1 | 1 | 0000000000000001 |
| 0000000000000000 | 1111111111111111 | 0 | 1 | 1 | 1 | 1 | 1 | 0000000000000001 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 1 | 1 | 1 | 0000000000000000 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 1 | 0 | 1111111111111111 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 1 | 0 | 1111111111111110 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 0 | 0 | 1 | 0 | 1111111111111111 |
| 0000000000000000 | 1111111111111111 | 0 | 1 | 0 | 0 | 1 | 1 | 0000000000000001 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 0 | 1 | 1 | 1 | 1111111111111111 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 0 | 0 | 0 | 0 | 0000000000000000 |
| 0000000000000000 | 1111111111111111 | 0 | 1 | 0 | 1 | 0 | 1 | 1111111111111111 |
| 0101101110100000 | 0001111011010010 | 1 | 0 | 1 | 0 | 1 | 0 | 0000000000000000 |
| 0101101110100000 | 0001111011010010 | 1 | 1 | 1 | 1 | 1 | 1 | 0000000000000001 |
| 0101101110100000 | 0001111011010010 | 1 | 1 | 1 | 0 | 1 | 0 | 1111111111111111 |
| 0101101110100000 | 0001111011010010 | 0 | 0 | 1 | 1 | 0 | 0 | 0101101110100000 |
| 0101101110100000 | 0001111011010010 | 1 | 1 | 0 | 0 | 0 | 0 | 0001111011010010 |
| 0101101110100000 | 0001111011010010 | 0 | 0 | 1 | 1 | 0 | 1 | 1010010001011111 |
| 0101101110100000 | 0001111011010010 | 1 | 1 | 0 | 0 | 0 | 1 | 1110000100101101 |
| 0101101110100000 | 0001111011010010 | 0 | 0 | 1 | 1 | 1 | 1 | 1010010001100000 |
| 0101101110100000 | 0001111011010010 | 1 | 1 | 0 | 0 | 1 | 1 | 1110000100101110 |
| 0101101110100000 | 0001111011010010 | 0 | 1 | 1 | 1 | 1 | 1 | 0101101110100001 |
| 0101101110100000 | 0001111011010010 | 1 | 1 | 0 | 1 | 1 | 1 | 0001111011010011 |
| 0101101110100000 | 0001111011010010 | 0 | 0 | 1 | 1 | 1 | 0 | 0101101110011111 |
| 0101101110100000 | 0001111011010010 | 1 | 1 | 0 | 0 | 1 | 0 | 0001111011010001 |
| 0101101110100000 | 0001111011010010 | 0 | 0 | 0 | 0 | 1 | 0 | 0111101001110010 |
| 0101101110100000 | 0001111011010010 | 0 | 1 | 0 | 0 | 1 | 1 | 0011110011001110 |
| 0101101110100000 | 0001111011010010 | 0 | 0 | 0 | 1 | 1 | 1 | 1100001100110010 |
| 0101101110100000 | 0001111011010010 | 0 | 0 | 0 | 0 | 0 | 0 | 0001101010000000 |
| 0101101110100000 | 0001111011010010 | 0 | 1 | 0 | 1 | 0 | 1 | 0101111111110010 |

353
projects/02/ALU-nostat.tst Normal file
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// This file is part of the materials accompanying the book
// "The Elements of Computing Systems" by Nisan and Schocken,
// MIT Press. Book site: www.idc.ac.il/tecs
// File name: projects/02/ALU-nostat.tst
// ALU-nostat.tst provides a partial test of the ALU chip.
// It IS NOT a replacement for ALU.tst.
// ALU-nostat.tst tests only the computation part of the ALU.
// The 'zr' and 'ng' status outputs are ignored.
// This test lets you concentrate on getting the ALU computation right without the
// additional task of handling the status outputs.
// Once your ALU passes ALU-nostat.tst you need to test it with ALU.tst.
// This way, any comparison failures during ALU.tst will be caused by errors in
// the handling of the 'zr' and 'ng' status outputs.
load ALU.hdl,
output-file ALU-nostat.out,
compare-to ALU-nostat.cmp,
output-list x%B1.16.1 y%B1.16.1 zx%B1.1.1 nx%B1.1.1 zy%B1.1.1
ny%B1.1.1 f%B1.1.1 no%B1.1.1 out%B1.16.1;
set x %B0000000000000000,
set y %B1111111111111111,
set zx 1,
set nx 0,
set zy 1,
set ny 0,
set f 1,
set no 0,
eval,
output;
set zx 1,
set nx 1,
set zy 1,
set ny 1,
set f 1,
set no 1,
eval,
output;
set zx 1,
set nx 1,
set zy 1,
set ny 0,
set f 1,
set no 0,
eval,
output;
set zx 0,
set nx 0,
set zy 1,
set ny 1,
set f 0,
set no 0,
eval,
output;
set zx 1,
set nx 1,
set zy 0,
set ny 0,
set f 0,
set no 0,
eval,
output;
set zx 0,
set nx 0,
set zy 1,
set ny 1,
set f 0,
set no 1,
eval,
output;
set zx 1,
set nx 1,
set zy 0,
set ny 0,
set f 0,
set no 1,
eval,
output;
set zx 0,
set nx 0,
set zy 1,
set ny 1,
set f 1,
set no 1,
eval,
output;
set zx 1,
set nx 1,
set zy 0,
set ny 0,
set f 1,
set no 1,
eval,
output;
set zx 0,
set nx 1,
set zy 1,
set ny 1,
set f 1,
set no 1,
eval,
output;
set zx 1,
set nx 1,
set zy 0,
set ny 1,
set f 1,
set no 1,
eval,
output;
set zx 0,
set nx 0,
set zy 1,
set ny 1,
set f 1,
set no 0,
eval,
output;
set zx 1,
set nx 1,
set zy 0,
set ny 0,
set f 1,
set no 0,
eval,
output;
set zx 0,
set nx 0,
set zy 0,
set ny 0,
set f 1,
set no 0,
eval,
output;
set zx 0,
set nx 1,
set zy 0,
set ny 0,
set f 1,
set no 1,
eval,
output;
set zx 0,
set nx 0,
set zy 0,
set ny 1,
set f 1,
set no 1,
eval,
output;
set zx 0,
set nx 0,
set zy 0,
set ny 0,
set f 0,
set no 0,
eval,
output;
set zx 0,
set nx 1,
set zy 0,
set ny 1,
set f 0,
set no 1,
eval,
output;
set x %B101101110100000,
set y %B001111011010010,
set zx 1,
set nx 0,
set zy 1,
set ny 0,
set f 1,
set no 0,
eval,
output;
set zx 1,
set nx 1,
set zy 1,
set ny 1,
set f 1,
set no 1,
eval,
output;
set zx 1,
set nx 1,
set zy 1,
set ny 0,
set f 1,
set no 0,
eval,
output;
set zx 0,
set nx 0,
set zy 1,
set ny 1,
set f 0,
set no 0,
eval,
output;
set zx 1,
set nx 1,
set zy 0,
set ny 0,
set f 0,
set no 0,
eval,
output;
set zx 0,
set nx 0,
set zy 1,
set ny 1,
set f 0,
set no 1,
eval,
output;
set zx 1,
set nx 1,
set zy 0,
set ny 0,
set f 0,
set no 1,
eval,
output;
set zx 0,
set nx 0,
set zy 1,
set ny 1,
set f 1,
set no 1,
eval,
output;
set zx 1,
set nx 1,
set zy 0,
set ny 0,
set f 1,
set no 1,
eval,
output;
set zx 0,
set nx 1,
set zy 1,
set ny 1,
set f 1,
set no 1,
eval,
output;
set zx 1,
set nx 1,
set zy 0,
set ny 1,
set f 1,
set no 1,
eval,
output;
set zx 0,
set nx 0,
set zy 1,
set ny 1,
set f 1,
set no 0,
eval,
output;
set zx 1,
set nx 1,
set zy 0,
set ny 0,
set f 1,
set no 0,
eval,
output;
set zx 0,
set nx 0,
set zy 0,
set ny 0,
set f 1,
set no 0,
eval,
output;
set zx 0,
set nx 1,
set zy 0,
set ny 0,
set f 1,
set no 1,
eval,
output;
set zx 0,
set nx 0,
set zy 0,
set ny 1,
set f 1,
set no 1,
eval,
output;
set zx 0,
set nx 0,
set zy 0,
set ny 0,
set f 0,
set no 0,
eval,
output;
set zx 0,
set nx 1,
set zy 0,
set ny 1,
set f 0,
set no 1,
eval,
output;

37
projects/02/ALU.cmp Normal file
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| x | y |zx |nx |zy |ny | f |no | out |zr |ng |
| 0000000000000000 | 1111111111111111 | 1 | 0 | 1 | 0 | 1 | 0 | 0000000000000000 | 1 | 0 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 1 | 1 | 1 | 1 | 0000000000000001 | 0 | 0 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 1 | 0 | 1 | 0 | 1111111111111111 | 0 | 1 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 0 | 0 | 0000000000000000 | 1 | 0 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 0 | 0 | 1111111111111111 | 0 | 1 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 0 | 1 | 1111111111111111 | 0 | 1 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 0 | 1 | 0000000000000000 | 1 | 0 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 1 | 1 | 0000000000000000 | 1 | 0 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 1 | 1 | 0000000000000001 | 0 | 0 |
| 0000000000000000 | 1111111111111111 | 0 | 1 | 1 | 1 | 1 | 1 | 0000000000000001 | 0 | 0 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 1 | 1 | 1 | 0000000000000000 | 1 | 0 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 1 | 0 | 1111111111111111 | 0 | 1 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 1 | 0 | 1111111111111110 | 0 | 1 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 0 | 0 | 1 | 0 | 1111111111111111 | 0 | 1 |
| 0000000000000000 | 1111111111111111 | 0 | 1 | 0 | 0 | 1 | 1 | 0000000000000001 | 0 | 0 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 0 | 1 | 1 | 1 | 1111111111111111 | 0 | 1 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 0 | 0 | 0 | 0 | 0000000000000000 | 1 | 0 |
| 0000000000000000 | 1111111111111111 | 0 | 1 | 0 | 1 | 0 | 1 | 1111111111111111 | 0 | 1 |
| 0000000000010001 | 0000000000000011 | 1 | 0 | 1 | 0 | 1 | 0 | 0000000000000000 | 1 | 0 |
| 0000000000010001 | 0000000000000011 | 1 | 1 | 1 | 1 | 1 | 1 | 0000000000000001 | 0 | 0 |
| 0000000000010001 | 0000000000000011 | 1 | 1 | 1 | 0 | 1 | 0 | 1111111111111111 | 0 | 1 |
| 0000000000010001 | 0000000000000011 | 0 | 0 | 1 | 1 | 0 | 0 | 0000000000010001 | 0 | 0 |
| 0000000000010001 | 0000000000000011 | 1 | 1 | 0 | 0 | 0 | 0 | 0000000000000011 | 0 | 0 |
| 0000000000010001 | 0000000000000011 | 0 | 0 | 1 | 1 | 0 | 1 | 1111111111101110 | 0 | 1 |
| 0000000000010001 | 0000000000000011 | 1 | 1 | 0 | 0 | 0 | 1 | 1111111111111100 | 0 | 1 |
| 0000000000010001 | 0000000000000011 | 0 | 0 | 1 | 1 | 1 | 1 | 1111111111101111 | 0 | 1 |
| 0000000000010001 | 0000000000000011 | 1 | 1 | 0 | 0 | 1 | 1 | 1111111111111101 | 0 | 1 |
| 0000000000010001 | 0000000000000011 | 0 | 1 | 1 | 1 | 1 | 1 | 0000000000010010 | 0 | 0 |
| 0000000000010001 | 0000000000000011 | 1 | 1 | 0 | 1 | 1 | 1 | 0000000000000100 | 0 | 0 |
| 0000000000010001 | 0000000000000011 | 0 | 0 | 1 | 1 | 1 | 0 | 0000000000010000 | 0 | 0 |
| 0000000000010001 | 0000000000000011 | 1 | 1 | 0 | 0 | 1 | 0 | 0000000000000010 | 0 | 0 |
| 0000000000010001 | 0000000000000011 | 0 | 0 | 0 | 0 | 1 | 0 | 0000000000010100 | 0 | 0 |
| 0000000000010001 | 0000000000000011 | 0 | 1 | 0 | 0 | 1 | 1 | 0000000000001110 | 0 | 0 |
| 0000000000010001 | 0000000000000011 | 0 | 0 | 0 | 1 | 1 | 1 | 1111111111110010 | 0 | 1 |
| 0000000000010001 | 0000000000000011 | 0 | 0 | 0 | 0 | 0 | 0 | 0000000000000001 | 0 | 0 |
| 0000000000010001 | 0000000000000011 | 0 | 1 | 0 | 1 | 0 | 1 | 0000000000010011 | 0 | 0 |

92
projects/02/ALU.hdl Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/02/ALU.hdl
/**
* The ALU (Arithmetic Logic Unit).
* Computes one of the following functions:
* x+y, x-y, y-x, 0, 1, -1, x, y, -x, -y, !x, !y,
* x+1, y+1, x-1, y-1, x&y, x|y on two 16-bit inputs,
* according to 6 input bits denoted zx,nx,zy,ny,f,no.
* In addition, the ALU computes two 1-bit outputs:
* if the ALU output == 0, zr is set to 1; otherwise zr is set to 0;
* if the ALU output < 0, ng is set to 1; otherwise ng is set to 0.
*/
// Implementation: the ALU logic manipulates the x and y inputs
// and operates on the resulting values, as follows:
// if (zx == 1) set x = 0 // 16-bit constant
// if (nx == 1) set x = !x // bitwise not
// if (zy == 1) set y = 0 // 16-bit constant
// if (ny == 1) set y = !y // bitwise not
// if (f == 1) set out = x + y // integer 2's complement addition
// if (f == 0) set out = x & y // bitwise and
// if (no == 1) set out = !out // bitwise not
// if (out == 0) set zr = 1
// if (out < 0) set ng = 1
CHIP ALU {
IN
x[16], y[16], // 16-bit inputs
zx, // zero the x input?
nx, // negate the x input?
zy, // zero the y input?
ny, // negate the y input?
f, // compute out = x + y (if 1) or x & y (if 0)
no; // negate the out output?
OUT
out[16], // 16-bit output
zr, // 1 if (out == 0), 0 otherwise
ng; // 1 if (out < 0), 0 otherwise
PARTS:
// 1. when zx = 1 --> x = 0
Mux16(a=x, b=false, sel=zx, out=muxx);
// 2. when nx = 1 negate x
Not16(in=muxx, out=notx);
Mux16(a=muxx, b=notx, sel=nx, out=x1);
// 3. when zy = 1 --> y = 0
Mux16(a=y, b=false, sel=zy, out=muxy);
// 4. when ny = 1 then negate y
Not16(in=muxy, out=noty);
Mux16(a=muxy, b=noty, sel=ny, out=y1);
// x+y
Add16(a=x1, b=y1, out=addxy);
// x&y
And16(a=x1, b=y1, out=xandy);
// if f then out = x+y else x&y
Mux16(a=xandy, b=addxy, sel=f, out=outmuxf);
// negate the output
Not16(in=outmuxf, out=notoutmuxf);
Mux16(a=outmuxf, b=notoutmuxf, sel=no, out[15]=ngout, out[0..7]=lsb, out[8..15]=msb, out=out);
// stats
// if out < 0 then ng = 1 --> out[15] and 1
And(a=ngout, b=true, out=ng);
//zr = 0 when out = 0
// 0..7 to Or8Way
Or8Way(in=lsb, out=oroutlsb);
// 8..15 to Or8Way
Or8Way(in=msb, out=oroutmsb);
Nor(a=oroutlsb, b=oroutmsb, out=zr);
}

73
projects/02/ALU.hdl.ext Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/02/ALU.hdl
/**
* The ALU (Arithmetic Logic Unit).
* Computes one of the following functions:
* x+y, x-y, y-x, 0, 1, -1, x, y, -x, -y, !x, !y,
* x+1, y+1, x-1, y-1, x&y, x|y on two 16-bit inputs,
* according to 6 input bits denoted zx,nx,zy,ny,f,no.
* In addition, the ALU computes two 1-bit outputs:
* if the ALU output == 0, zr is set to 1; otherwise zr is set to 0;
* if the ALU output < 0, ng is set to 1; otherwise ng is set to 0.
*/
// Implementation: the ALU logic manipulates the x and y inputs
// and operates on the resulting values, as follows:
// if (zx == 1) set x = 0 // 16-bit constant
// if (nx == 1) set x = !x // bitwise not
// if (zy == 1) set y = 0 // 16-bit constant
// if (ny == 1) set y = !y // bitwise not
// if (f == 1) set out = x + y // integer 2's complement addition
// if (f == 0) set out = x & y // bitwise and
// if (no == 1) set out = !out // bitwise not
// if (out == 0) set zr = 1
// if (out < 0) set ng = 1
CHIP ALU {
IN
x[16], y[16], // 16-bit inputs
zx, // zero the x input?
nx, // negate the x input?
zy, // zero the y input?
ny, // negate the y input?
f, // compute out = x + y (if 1) or x & y (if 0)
no; // negate the out output?
OUT
out[16], // 16-bit output
zr, // 1 if (out == 0), 0 otherwise
ng; // 1 if (out < 0), 0 otherwise
PARTS:
// x zero / negate
Mux16(a=x, sel=zx, out=x1);
Not16(in=x1, out=negatedX);
Mux16(a=x1, b=negatedX, sel=nx, out=x2);
// y zero / negate
Mux16(a=y, sel=zy, out=y1);
Not16(in=y1, out=negatedY);
Mux16(a=y1, b=negatedY, sel=ny, out=y2);
// x + y OR x & y
Add16(a=x2, b=y2, out=added);
And16(a=x2, b=y2, out=xyAnd);
Mux16(a=xyAnd, b=added, sel=f, out=result);
// negate the output?
Not16(in=result, out=negatedResult);
Mux16(a=result, b=negatedResult, sel=no, out=out, out[15]=firstOut, out[0..7]=finalLeft, out[8..15]=finalRight);
// output == 0 (zr)
Or8Way(in=finalLeft, out=zrl);
Or8Way(in=finalRight, out=zrr);
Or(a=zrl, b=zrr, out=nzr);
Not(in=nzr, out=zr);
// output < 0 (ng)
And(a=firstOut, b=true, out=ng);
}

58
projects/02/ALU.hdl.org Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/02/ALU.hdl
/**
* The ALU (Arithmetic Logic Unit).
* Computes one of the following functions:
* x+y, x-y, y-x, 0, 1, -1, x, y, -x, -y, !x, !y,
* x+1, y+1, x-1, y-1, x&y, x|y on two 16-bit inputs,
* according to 6 input bits denoted zx,nx,zy,ny,f,no.
* In addition, the ALU computes two 1-bit outputs:
* if the ALU output == 0, zr is set to 1; otherwise zr is set to 0;
* if the ALU output < 0, ng is set to 1; otherwise ng is set to 0.
*/
// Implementation: the ALU logic manipulates the x and y inputs
// and operates on the resulting values, as follows:
// if (zx == 1) set x = 0 // 16-bit constant
// if (nx == 1) set x = !x // bitwise not
// if (zy == 1) set y = 0 // 16-bit constant
// if (ny == 1) set y = !y // bitwise not
// if (f == 1) set out = x + y // integer 2's complement addition
// if (f == 0) set out = x & y // bitwise and
// if (no == 1) set out = !out // bitwise not
// if (out == 0) set zr = 1
// if (out < 0) set ng = 1
CHIP ALU {
IN
x[16], y[16], // 16-bit inputs
zx, // zero the x input?
nx, // negate the x input?
zy, // zero the y input?
ny, // negate the y input?
f, // compute out = x + y (if 1) or x & y (if 0)
no; // negate the out output?
OUT
out[16], // 16-bit output
zr, // 1 if (out == 0), 0 otherwise
ng; // 1 if (out < 0), 0 otherwise
PARTS:
// 1. when zx = 1 --> x = 0
Mux16(a=x, b=false, sel=zx, out=mux_x);
// 2. when nx = 1 negate x
Not16(in=mux_x, out=not_x);
Mux16(a=mux_x, b=not_x, sel=nx, out=x_1);
// 3. when zy = 1 --> y = 0
Mux16(a=y, b=false, sel=zy, out=mux_y);
// 4. when ny = 1 then negate y
Not16(in=mux_y, out=not_y);
Mux16(a=mux_y, b=not_y, sel=ny, out=y_1);
}

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| x | y |zx |nx |zy |ny | f |no | out |zr |ng |
| 0000000000000000 | 1111111111111111 | 1 | 0 | 1 | 0 | 1 | 0 | 0000000000000000 | 1 | 0 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 1 | 1 | 1 | 1 | 0000000000000001 | 0 | 0 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 1 | 0 | 1 | 0 | 1111111111111111 | 0 | 1 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 0 | 0 | 0000000000000000 | 1 | 0 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 0 | 0 | 1111111111111111 | 0 | 1 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 0 | 1 | 1111111111111111 | 0 | 1 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 0 | 1 | 0000000000000000 | 1 | 0 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 1 | 1 | 0000000000000000 | 1 | 0 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 1 | 1 | 0000000000000001 | 0 | 0 |
| 0000000000000000 | 1111111111111111 | 0 | 1 | 1 | 1 | 1 | 1 | 0000000000000001 | 0 | 0 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 1 | 1 | 1 | 0000000000000000 | 1 | 0 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 1 | 1 | 1 | 0 | 1111111111111111 | 0 | 1 |
| 0000000000000000 | 1111111111111111 | 1 | 1 | 0 | 0 | 1 | 0 | 1111111111111110 | 0 | 1 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 0 | 0 | 1 | 0 | 1111111111111111 | 0 | 1 |
| 0000000000000000 | 1111111111111111 | 0 | 1 | 0 | 0 | 1 | 1 | 0000000000000001 | 0 | 0 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 0 | 1 | 1 | 1 | 1111111111111111 | 0 | 1 |
| 0000000000000000 | 1111111111111111 | 0 | 0 | 0 | 0 | 0 | 0 | 0000000000000000 | 1 | 0 |
| 0000000000000000 | 1111111111111111 | 0 | 1 | 0 | 1 | 0 | 1 | 1111111111111111 | 0 | 1 |
| 0000000000010001 | 0000000000000011 | 1 | 0 | 1 | 0 | 1 | 0 | 0000000000000000 | 1 | 0 |
| 0000000000010001 | 0000000000000011 | 1 | 1 | 1 | 1 | 1 | 1 | 0000000000000001 | 0 | 0 |
| 0000000000010001 | 0000000000000011 | 1 | 1 | 1 | 0 | 1 | 0 | 1111111111111111 | 0 | 1 |
| 0000000000010001 | 0000000000000011 | 0 | 0 | 1 | 1 | 0 | 0 | 0000000000010001 | 0 | 0 |
| 0000000000010001 | 0000000000000011 | 1 | 1 | 0 | 0 | 0 | 0 | 0000000000000011 | 0 | 0 |
| 0000000000010001 | 0000000000000011 | 0 | 0 | 1 | 1 | 0 | 1 | 1111111111101110 | 0 | 1 |
| 0000000000010001 | 0000000000000011 | 1 | 1 | 0 | 0 | 0 | 1 | 1111111111111100 | 0 | 1 |
| 0000000000010001 | 0000000000000011 | 0 | 0 | 1 | 1 | 1 | 1 | 1111111111101111 | 0 | 1 |
| 0000000000010001 | 0000000000000011 | 1 | 1 | 0 | 0 | 1 | 1 | 1111111111111101 | 0 | 1 |
| 0000000000010001 | 0000000000000011 | 0 | 1 | 1 | 1 | 1 | 1 | 0000000000010010 | 0 | 0 |
| 0000000000010001 | 0000000000000011 | 1 | 1 | 0 | 1 | 1 | 1 | 0000000000000100 | 0 | 0 |
| 0000000000010001 | 0000000000000011 | 0 | 0 | 1 | 1 | 1 | 0 | 0000000000010000 | 0 | 0 |
| 0000000000010001 | 0000000000000011 | 1 | 1 | 0 | 0 | 1 | 0 | 0000000000000010 | 0 | 0 |
| 0000000000010001 | 0000000000000011 | 0 | 0 | 0 | 0 | 1 | 0 | 0000000000010100 | 0 | 0 |
| 0000000000010001 | 0000000000000011 | 0 | 1 | 0 | 0 | 1 | 1 | 0000000000001110 | 0 | 0 |
| 0000000000010001 | 0000000000000011 | 0 | 0 | 0 | 1 | 1 | 1 | 1111111111110010 | 0 | 1 |
| 0000000000010001 | 0000000000000011 | 0 | 0 | 0 | 0 | 0 | 0 | 0000000000000001 | 0 | 0 |
| 0000000000010001 | 0000000000000011 | 0 | 1 | 0 | 1 | 0 | 1 | 0000000000010011 | 0 | 0 |

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/02/ALU.tst
load ALU.hdl,
output-file ALU.out,
compare-to ALU.cmp,
output-list x%B1.16.1 y%B1.16.1 zx%B1.1.1 nx%B1.1.1 zy%B1.1.1
ny%B1.1.1 f%B1.1.1 no%B1.1.1 out%B1.16.1 zr%B1.1.1
ng%B1.1.1;
set x %B0000000000000000, // x = 0
set y %B1111111111111111; // y = -1
// Compute 0
set zx 1,
set nx 0,
set zy 1,
set ny 0,
set f 1,
set no 0,
eval,
output;
// Compute 1
set zx 1,
set nx 1,
set zy 1,
set ny 1,
set f 1,
set no 1,
eval,
output;
// Compute -1
set zx 1,
set nx 1,
set zy 1,
set ny 0,
set f 1,
set no 0,
eval,
output;
// Compute x
set zx 0,
set nx 0,
set zy 1,
set ny 1,
set f 0,
set no 0,
eval,
output;
// Compute y
set zx 1,
set nx 1,
set zy 0,
set ny 0,
set f 0,
set no 0,
eval,
output;
// Compute !x
set zx 0,
set nx 0,
set zy 1,
set ny 1,
set f 0,
set no 1,
eval,
output;
// Compute !y
set zx 1,
set nx 1,
set zy 0,
set ny 0,
set f 0,
set no 1,
eval,
output;
// Compute -x
set zx 0,
set nx 0,
set zy 1,
set ny 1,
set f 1,
set no 1,
eval,
output;
// Compute -y
set zx 1,
set nx 1,
set zy 0,
set ny 0,
set f 1,
set no 1,
eval,
output;
// Compute x + 1
set zx 0,
set nx 1,
set zy 1,
set ny 1,
set f 1,
set no 1,
eval,
output;
// Compute y + 1
set zx 1,
set nx 1,
set zy 0,
set ny 1,
set f 1,
set no 1,
eval,
output;
// Compute x - 1
set zx 0,
set nx 0,
set zy 1,
set ny 1,
set f 1,
set no 0,
eval,
output;
// Compute y - 1
set zx 1,
set nx 1,
set zy 0,
set ny 0,
set f 1,
set no 0,
eval,
output;
// Compute x + y
set zx 0,
set nx 0,
set zy 0,
set ny 0,
set f 1,
set no 0,
eval,
output;
// Compute x - y
set zx 0,
set nx 1,
set zy 0,
set ny 0,
set f 1,
set no 1,
eval,
output;
// Compute y - x
set zx 0,
set nx 0,
set zy 0,
set ny 1,
set f 1,
set no 1,
eval,
output;
// Compute x & y
set zx 0,
set nx 0,
set zy 0,
set ny 0,
set f 0,
set no 0,
eval,
output;
// Compute x | y
set zx 0,
set nx 1,
set zy 0,
set ny 1,
set f 0,
set no 1,
eval,
output;
set x %B000000000010001, // x = 17
set y %B000000000000011; // y = 3
// Compute 0
set zx 1,
set nx 0,
set zy 1,
set ny 0,
set f 1,
set no 0,
eval,
output;
// Compute 1
set zx 1,
set nx 1,
set zy 1,
set ny 1,
set f 1,
set no 1,
eval,
output;
// Compute -1
set zx 1,
set nx 1,
set zy 1,
set ny 0,
set f 1,
set no 0,
eval,
output;
// Compute x
set zx 0,
set nx 0,
set zy 1,
set ny 1,
set f 0,
set no 0,
eval,
output;
// Compute y
set zx 1,
set nx 1,
set zy 0,
set ny 0,
set f 0,
set no 0,
eval,
output;
// Compute !x
set zx 0,
set nx 0,
set zy 1,
set ny 1,
set f 0,
set no 1,
eval,
output;
// Compute !y
set zx 1,
set nx 1,
set zy 0,
set ny 0,
set f 0,
set no 1,
eval,
output;
// Compute -x
set zx 0,
set nx 0,
set zy 1,
set ny 1,
set f 1,
set no 1,
eval,
output;
// Compute -y
set zx 1,
set nx 1,
set zy 0,
set ny 0,
set f 1,
set no 1,
eval,
output;
// Compute x + 1
set zx 0,
set nx 1,
set zy 1,
set ny 1,
set f 1,
set no 1,
eval,
output;
// Compute y + 1
set zx 1,
set nx 1,
set zy 0,
set ny 1,
set f 1,
set no 1,
eval,
output;
// Compute x - 1
set zx 0,
set nx 0,
set zy 1,
set ny 1,
set f 1,
set no 0,
eval,
output;
// Compute y - 1
set zx 1,
set nx 1,
set zy 0,
set ny 0,
set f 1,
set no 0,
eval,
output;
// Compute x + y
set zx 0,
set nx 0,
set zy 0,
set ny 0,
set f 1,
set no 0,
eval,
output;
// Compute x - y
set zx 0,
set nx 1,
set zy 0,
set ny 0,
set f 1,
set no 1,
eval,
output;
// Compute y - x
set zx 0,
set nx 0,
set zy 0,
set ny 1,
set f 1,
set no 1,
eval,
output;
// Compute x & y
set zx 0,
set nx 0,
set zy 0,
set ny 0,
set f 0,
set no 0,
eval,
output;
// Compute x | y
set zx 0,
set nx 1,
set zy 0,
set ny 1,
set f 0,
set no 1,
eval,
output;

7
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| a | b | out |
| 0000000000000000 | 0000000000000000 | 0000000000000000 |
| 0000000000000000 | 1111111111111111 | 1111111111111111 |
| 1111111111111111 | 1111111111111111 | 1111111111111110 |
| 1010101010101010 | 0101010101010101 | 1111111111111111 |
| 0011110011000011 | 0000111111110000 | 0100110010110011 |
| 0001001000110100 | 1001100001110110 | 1010101010101010 |

32
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/02/Adder16.hdl
/**
* Adds two 16-bit values.
* The most significant carry bit is ignored.
*/
CHIP Add16 {
IN a[16], b[16];
OUT out[16];
PARTS:
HalfAdder(a=a[0], b=b[0], sum=out[0], carry=carha1);
FullAdder(a=a[1], b=b[1], c=carha1, sum=out[1], carry=carha2);
FullAdder(a=a[2], b=b[2], c=carha2, sum=out[2], carry=carha3);
FullAdder(a=a[3], b=b[3], c=carha3, sum=out[3], carry=carha4);
FullAdder(a=a[4], b=b[4], c=carha4, sum=out[4], carry=carha5);
FullAdder(a=a[5], b=b[5], c=carha5, sum=out[5], carry=carha6);
FullAdder(a=a[6], b=b[6], c=carha6, sum=out[6], carry=carha7);
FullAdder(a=a[7], b=b[7], c=carha7, sum=out[7], carry=carha8);
FullAdder(a=a[8], b=b[8], c=carha8, sum=out[8], carry=carha9);
FullAdder(a=a[9], b=b[9], c=carha9, sum=out[9], carry=carha10);
FullAdder(a=a[10], b=b[10], c=carha10, sum=out[10], carry=carha11);
FullAdder(a=a[11], b=b[11], c=carha11, sum=out[11], carry=carha12);
FullAdder(a=a[12], b=b[12], c=carha12, sum=out[12], carry=carha13);
FullAdder(a=a[13], b=b[13], c=carha13, sum=out[13], carry=carha14);
FullAdder(a=a[14], b=b[14], c=carha14, sum=out[14], carry=carha15);
FullAdder(a=a[15], b=b[15], c=carha15, sum=out[15], carry=false);
}

7
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| a | b | out |
| 0000000000000000 | 0000000000000000 | 0000000000000000 |
| 0000000000000000 | 1111111111111111 | 1111111111111111 |
| 1111111111111111 | 1111111111111111 | 1111111111111110 |
| 1010101010101010 | 0101010101010101 | 1111111111111111 |
| 0011110011000011 | 0000111111110000 | 0100110010110011 |
| 0001001000110100 | 1001100001110110 | 1010101010101010 |

39
projects/02/Add16.tst Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/02/Add16.tst
load Add16.hdl,
output-file Add16.out,
compare-to Add16.cmp,
output-list a%B1.16.1 b%B1.16.1 out%B1.16.1;
set a %B0000000000000000,
set b %B0000000000000000,
eval,
output;
set a %B0000000000000000,
set b %B1111111111111111,
eval,
output;
set a %B1111111111111111,
set b %B1111111111111111,
eval,
output;
set a %B1010101010101010,
set b %B0101010101010101,
eval,
output;
set a %B0011110011000011,
set b %B0000111111110000,
eval,
output;
set a %B0001001000110100,
set b %B1001100001110110,
eval,
output;

19
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/And.hdl
/**
* And gate:
* out = 1 if (a == 1 and b == 1)
* 0 otherwise
*/
CHIP And {
IN a, b;
OUT out;
PARTS:
Nand(a=a ,b=b ,out=nandout);
Not(in=nandout ,out=out);
}

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projects/02/FullAdder.cmp Normal file
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| a | b | c | sum | carry |
| 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 1 | 0 |
| 0 | 1 | 0 | 1 | 0 |
| 0 | 1 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 | 0 |
| 1 | 0 | 1 | 0 | 1 |
| 1 | 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 1 | 1 |

19
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/02/FullAdder.hdl
/**
* Computes the sum of three bits.
*/
CHIP FullAdder {
IN a, b, c; // 1-bit inputs
OUT sum, // Right bit of a + b + c
carry; // Left bit of a + b + c
PARTS:
HalfAdder(a=a, b=b, sum=ha1sum, carry=ha1carry);
HalfAdder(a=ha1sum, b=c, sum=sum, carry=ha2carry);
Or(a=ha1carry, b=ha2carry, out=carry);
}

9
projects/02/FullAdder.out Normal file
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| a | b | c | sum | carry |
| 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 1 | 0 |
| 0 | 1 | 0 | 1 | 0 |
| 0 | 1 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 | 0 |
| 1 | 0 | 1 | 0 | 1 |
| 1 | 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 1 | 1 |

47
projects/02/FullAdder.tst Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/02/FullAdder.tst
load FullAdder.hdl,
output-file FullAdder.out,
compare-to FullAdder.cmp,
output-list a%B3.1.3 b%B3.1.3 c%B3.1.3 sum%B3.1.3 carry%B3.1.3;
set a 0,
set b 0,
set c 0,
eval,
output;
set c 1,
eval,
output;
set b 1,
set c 0,
eval,
output;
set c 1,
eval,
output;
set a 1,
set b 0,
set c 0,
eval,
output;
set c 1,
eval,
output;
set b 1,
set c 0,
eval,
output;
set c 1,
eval,
output;

5
projects/02/HalfAdder.cmp Normal file
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| a | b | sum | carry |
| 0 | 0 | 0 | 0 |
| 0 | 1 | 1 | 0 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 1 |

19
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/02/HalfAdder.hdl
/**
* Computes the sum of two bits.
*/
CHIP HalfAdder {
IN a, b; // 1-bit inputs
OUT sum, // Right bit of a + b
carry; // Left bit of a + b
PARTS:
Xor(a=a, b=b, out=sum);
And(a=a, b=b, out=carry);
}

5
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| a | b | sum | carry |
| 0 | 0 | 0 | 0 |
| 0 | 1 | 1 | 0 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 1 |

29
projects/02/HalfAdder.tst Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/02/HalfAdder.tst
load HalfAdder.hdl,
output-file HalfAdder.out,
compare-to HalfAdder.cmp,
output-list a%B3.1.3 b%B3.1.3 sum%B3.1.3 carry%B3.1.3;
set a 0,
set b 0,
eval,
output;
set a 0,
set b 1,
eval,
output;
set a 1,
set b 0,
eval,
output;
set a 1,
set b 1,
eval,
output;

5
projects/02/Inc16.cmp Normal file
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| in | out |
| 0000000000000000 | 0000000000000001 |
| 1111111111111111 | 0000000000000000 |
| 0000000000000101 | 0000000000000110 |
| 1111111111111011 | 1111111111111100 |

32
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/02/Inc16.hdl
/**
* 16-bit incrementer:
* out = in + 1 (arithmetic addition)
*/
CHIP Inc16 {
IN in[16];
OUT out[16];
PARTS:
HalfAdder(a=in[0], b=true, sum=out[0], carry=ha1carry);
HalfAdder(a=in[1], b=ha1carry, sum=out[1], carry=ha2carry);
HalfAdder(a=in[2], b=ha2carry, sum=out[2], carry=ha3carry);
HalfAdder(a=in[3], b=ha3carry, sum=out[3], carry=ha4carry);
HalfAdder(a=in[4], b=ha4carry, sum=out[4], carry=ha5carry);
HalfAdder(a=in[5], b=ha5carry, sum=out[5], carry=ha6carry);
HalfAdder(a=in[6], b=ha6carry, sum=out[6], carry=ha7carry);
HalfAdder(a=in[7], b=ha7carry, sum=out[7], carry=ha8carry);
HalfAdder(a=in[8], b=ha8carry, sum=out[8], carry=ha9carry);
HalfAdder(a=in[9], b=ha9carry, sum=out[9], carry=ha10carry);
HalfAdder(a=in[10], b=ha10carry, sum=out[10], carry=ha11carry);
HalfAdder(a=in[11], b=ha11carry, sum=out[11], carry=ha12carry);
HalfAdder(a=in[12], b=ha12carry, sum=out[12], carry=ha13carry);
HalfAdder(a=in[13], b=ha13carry, sum=out[13], carry=ha14carry);
HalfAdder(a=in[14], b=ha14carry, sum=out[14], carry=ha15carry);
HalfAdder(a=in[15], b=ha14carry, sum=out[15], carry=false);
}

5
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| in | out |
| 0000000000000000 | 0000000000000001 |
| 1111111111111111 | 0000000000000000 |
| 0000000000000101 | 0000000000000110 |
| 1111111111111011 | 1111111111111100 |

25
projects/02/Inc16.tst Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/02/Inc16.tst
load Inc16.hdl,
output-file Inc16.out,
compare-to Inc16.cmp,
output-list in%B1.16.1 out%B1.16.1;
set in %B0000000000000000, // in = 0
eval,
output;
set in %B1111111111111111, // in = -1
eval,
output;
set in %B0000000000000101, // in = 5
eval,
output;
set in %B1111111111111011, // in = -5
eval,
output;

21
projects/02/Nor.hdl Normal file
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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/Or.hdl
/**
* Or gate:
* out = 1 if (a == 1 or b == 1)
* 0 otherwise
*/
CHIP Nor {
IN a, b;
OUT out;
PARTS:
Not(in=a,out=nota);
Not(in=b,out=notb);
Nand(a=nota,b=notb,out=nandout);
Not(in=nandout, out=out);
}

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https://sterlingmorley.gitbooks.io/nand2tetris/content/alu.html
https://github.com/Olical/nand2tetris/blob/master/chips/arithmatic/ALU.hdl

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/Or.hdl
/**
* Or gate:
* out = 1 if (a == 1 or b == 1)
* 0 otherwise
*/
CHIP Or {
IN a, b;
OUT out;
PARTS:
Not(in=a,out=nota);
Not(in=b,out=notb);
Nand(a=nota,b=notb,out=out);
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/Or8Way.hdl
/**
* 8-way Or:
* out = (in[0] or in[1] or ... or in[7])
*/
CHIP Or8Way {
IN in[8];
OUT out;
PARTS:
Or(a=in[0],b=in[1],out=or1);
Or(a=or1,b=in[2],out=or2);
Or(a=or2,b=in[3],out=or3);
Or(a=or3,b=in[4],out=or4);
Or(a=or4,b=in[5],out=or5);
Or(a=or5,b=in[6],out=or6);
Or(a=or6,b=in[7],out=out);
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/01/Xor.hdl
/**
* Exclusive-or gate:
* out = not (a == b)
*/
CHIP Xor {
IN a, b;
OUT out;
PARTS:
Not(in=a, out=nota);
Not(in=b, out=notb);
Nand(a=nota, b=b, out=nandout1);
Nand(a=a, b=notb, out=nandout2);
Nand(a=nandout1, b=nandout2, out=out);
}

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-2-
https://sterlingmorley.gitbooks.io/nand2tetris/content/alu.html
https://github.com/Olical/nand2tetris/blob/master/chips/arithmatic/ALU.hdl
https://github.com/ikenox/nand2tetris/blob/master/02/ALU.hdl
https://clubcomputer.at/2022/08/25/digitaltechnik-begreifbar-machen/
-3-
https://yizhe87.medium.com/from-nand-to-tetris-nand2tetris-project-3-7eb1bc8ef846
https://liaoyenling.gitbooks.io/nand2tetris/content/chapter3.html
https://seulcode.tistory.com/579

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