Anpassungen Path-Struktur
This commit is contained in:
BIN
original/tools/builtInChips/ALU.class
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BIN
original/tools/builtInChips/ALU.class
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original/tools/builtInChips/ALU.hdl
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original/tools/builtInChips/ALU.hdl
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// This file is part of www.nand2tetris.org
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// and the book "The Elements of Computing Systems"
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||||
// by Nisan and Schocken, MIT Press.
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||||
// File name: tools/builtInChips/ALU.hdl
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/**
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* ALU (Arithmetic Logic Unit):
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* Computes out = one of the following functions:
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* 0, 1, -1,
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* x, y, !x, !y, -x, -y,
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* x + 1, y + 1, x - 1, y - 1,
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* x + y, x - y, y - x,
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* x & y, x | y
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* on the 16-bit inputs x, y,
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* according to the input bits zx, nx, zy, ny, f, no.
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* In addition, computes the output bits:
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* zr = (out == 0, 1, 0)
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* ng = (out < 0, 1, 0)
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*/
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// Implementation: Manipulates the x and y inputs
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// and operates on the resulting values, as follows:
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// if (zx == 1) sets x = 0 // 16-bit constant
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// if (nx == 1) sets x = !x // bitwise not
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// if (zy == 1) sets y = 0 // 16-bit constant
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// if (ny == 1) sets y = !y // bitwise not
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// if (f == 1) sets out = x + y // integer 2's complement addition
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// if (f == 0) sets out = x & y // bitwise and
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// if (no == 1) sets out = !out // bitwise not
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CHIP ALU {
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IN // 16-bit inputs:
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x[16], y[16],
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// Control bits:
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zx, // Zero the x input
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nx, // Negate the x input
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zy, // Zero the y input
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ny, // Negate the y input
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f, // Function code: 1 for add, 0 for and
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no; // Negate the out output
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OUT // 16-bit output
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out[16],
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// ALU output flags
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zr, // 1 if out=0, 0 otherwise
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ng; // 1 if out<0, 0 otherwise
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BUILTIN ALU;
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}
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BIN
original/tools/builtInChips/ARegister.class
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BIN
original/tools/builtInChips/ARegister.class
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original/tools/builtInChips/ARegister.hdl
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original/tools/builtInChips/ARegister.hdl
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// This file is part of www.nand2tetris.org
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// and the book "The Elements of Computing Systems"
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// by Nisan and Schocken, MIT Press.
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// File name: tools/builtInChips/ARegister.hdl
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/**
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* A 16-bit register named ARegister with the same functionality
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* of the Register chip:
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* If load is asserted, the register's value is set to in;
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* Otherwise, the register maintains its current value.
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* out(t+1) = (load(t), in(t), out(t))
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*
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* This built-in implementation has a visualization side effect.
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*/
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CHIP ARegister {
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IN in[16], load;
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OUT out[16];
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BUILTIN ARegister;
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CLOCKED in, load;
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}
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BIN
original/tools/builtInChips/Add16.class
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BIN
original/tools/builtInChips/Add16.class
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original/tools/builtInChips/Add16.hdl
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original/tools/builtInChips/Add16.hdl
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// This file is part of www.nand2tetris.org
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// and the book "The Elements of Computing Systems"
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// by Nisan and Schocken, MIT Press.
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// File name: tools/builtInChips/Add16.hdl
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/**
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* 16-bit adder: Adds two 16-bit two's complement values.
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* The most significant carry bit is ignored.
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*/
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CHIP Add16 {
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IN a[16], b[16];
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OUT out[16];
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BUILTIN Add16;
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}
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BIN
original/tools/builtInChips/And.class
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BIN
original/tools/builtInChips/And.class
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original/tools/builtInChips/And.hdl
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original/tools/builtInChips/And.hdl
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// This file is part of www.nand2tetris.org
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// and the book "The Elements of Computing Systems"
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// by Nisan and Schocken, MIT Press.
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// File name: tools/builtInChips/And.hdl
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/**
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* And gate:
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* out = (((a == 1) && (b == 1))), 1, 0)
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*/
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CHIP And {
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IN a, b;
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OUT out;
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BUILTIN And;
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}
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16
original/tools/builtInChips/And16.hdl
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original/tools/builtInChips/And16.hdl
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// This file is part of www.nand2tetris.org
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// and the book "The Elements of Computing Systems"
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// by Nisan and Schocken, MIT Press.
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// File name: tools/builtInChips/And16.hdl
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/**
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* 16-bit bitwise And gate:
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* out[i] = And(a[i],b[i]) for i = 0..15
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*/
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CHIP And16 {
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IN a[16], b[16];
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OUT out[16];
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BUILTIN And;
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}
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BIN
original/tools/builtInChips/Bit.class
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BIN
original/tools/builtInChips/Bit.class
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original/tools/builtInChips/Bit.hdl
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original/tools/builtInChips/Bit.hdl
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// This file is part of www.nand2tetris.org
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// and the book "The Elements of Computing Systems"
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// by Nisan and Schocken, MIT Press.
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// File name: tools/builtInChips/Bit.hdl
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/**
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* 1-bit register:
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* If load is asserted, the register's value is set to in;
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* Otherwise, the register maintains its current value.
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* out(t+1) = (load(t), in(t), out(t))
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*/
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CHIP Bit {
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IN in, load;
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OUT out;
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BUILTIN Bit;
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CLOCKED in, load;
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}
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BIN
original/tools/builtInChips/DFF.class
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original/tools/builtInChips/DFF.class
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original/tools/builtInChips/DFF.hdl
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original/tools/builtInChips/DFF.hdl
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||||
// This file is part of www.nand2tetris.org
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||||
// and the book "The Elements of Computing Systems"
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// by Nisan and Schocken, MIT Press.
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// File name: tools/builtInChips/DFF.hdl
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/**
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* Data Flip-flop: out(t) = in(t-1)
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* where t is the current time unit, or clock cycle.
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*/
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CHIP DFF {
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IN in;
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OUT out;
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BUILTIN DFF;
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CLOCKED in;
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}
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BIN
original/tools/builtInChips/DMux.class
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BIN
original/tools/builtInChips/DMux.class
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original/tools/builtInChips/DMux.hdl
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original/tools/builtInChips/DMux.hdl
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||||
// This file is part of www.nand2tetris.org
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||||
// and the book "The Elements of Computing Systems"
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// by Nisan and Schocken, MIT Press.
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// File name: tools/builtInChips/DMux.hdl
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/**
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* Demultiplexor:
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* [a, b] = ((sel == 0), [in, 0], [0, in])
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||||
*/
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CHIP DMux {
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||||
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IN in, sel;
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OUT a, b;
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||||
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BUILTIN DMux;
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}
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BIN
original/tools/builtInChips/DMux4Way.class
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BIN
original/tools/builtInChips/DMux4Way.class
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original/tools/builtInChips/DMux4Way.hdl
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original/tools/builtInChips/DMux4Way.hdl
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||||
// This file is part of www.nand2tetris.org
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||||
// and the book "The Elements of Computing Systems"
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// by Nisan and Schocken, MIT Press.
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// File name: tools/builtInChips/DMux4Way.hdl
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/**
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* 4-way demultiplexor:
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* [a, b, c, d] = [in, 0, 0, 0] if sel == 00
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* [0, in, 0, 0] if sel == 01
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* [0, 0, in, 0] if sel == 10
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* [0, 0, 0, in] if sel == 11
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*/
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CHIP DMux4Way {
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IN in, sel[2];
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OUT a, b, c, d;
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BUILTIN DMux4Way;
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}
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||||
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BIN
original/tools/builtInChips/DMux8Way.class
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BIN
original/tools/builtInChips/DMux8Way.class
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original/tools/builtInChips/DMux8Way.hdl
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original/tools/builtInChips/DMux8Way.hdl
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||||
// This file is part of www.nand2tetris.org
|
||||
// and the book "The Elements of Computing Systems"
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||||
// by Nisan and Schocken, MIT Press.
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||||
// File name: tools/builtInChips/DMux8Way.hdl
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||||
/**
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||||
* 8-way demultiplexor:
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* [a, b, c, d, e, f, g, h] = [in, 0, 0, 0, 0, 0, 0, 0] if sel == 000
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||||
* [0, in, 0, 0, 0, 0, 0, 0] if sel == 001
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* ...
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* [0, 0, 0, 0, 0, 0, 0, in] if sel == 111
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*/
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CHIP DMux8Way {
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IN in, sel[3];
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OUT a, b, c, d, e, f, g, h;
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BUILTIN DMux8Way;
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||||
}
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||||
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||||
BIN
original/tools/builtInChips/DRegister.class
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BIN
original/tools/builtInChips/DRegister.class
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original/tools/builtInChips/DRegister.hdl
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original/tools/builtInChips/DRegister.hdl
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||||
// This file is part of www.nand2tetris.org
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||||
// and the book "The Elements of Computing Systems"
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// by Nisan and Schocken, MIT Press.
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||||
// File name: tools/builtInChips/DRegister.hdl
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||||
/**
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||||
* A 16-bit register named DRegister with the same functionality
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||||
* of the Register chip:
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* If load is asserted, the register's value is set to in;
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* Otherwise, the register maintains its current value.
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* out(t+1) = (load(t), in(t), out(t))
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*
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* This built-in implementation has a visualization side effect.
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*/
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CHIP DRegister {
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IN in[16], load;
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OUT out[16];
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BUILTIN DRegister;
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CLOCKED in, load;
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}
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BIN
original/tools/builtInChips/FullAdder.class
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original/tools/builtInChips/FullAdder.class
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original/tools/builtInChips/FullAdder.hdl
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original/tools/builtInChips/FullAdder.hdl
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||||
// This file is part of www.nand2tetris.org
|
||||
// and the book "The Elements of Computing Systems"
|
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// by Nisan and Schocken, MIT Press.
|
||||
// File name: tools/builtInChips/FullAdder.hdl
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||||
/**
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||||
* Computes the sum of three bits.
|
||||
*/
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||||
CHIP FullAdder {
|
||||
|
||||
IN a, b, c;
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OUT sum, // LSB of a + b + c
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||||
carry; // MSB of a + b + c
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||||
|
||||
BUILTIN FullAdder;
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||||
}
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||||
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||||
BIN
original/tools/builtInChips/HalfAdder.class
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original/tools/builtInChips/HalfAdder.class
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original/tools/builtInChips/HalfAdder.hdl
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original/tools/builtInChips/HalfAdder.hdl
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||||
// This file is part of www.nand2tetris.org
|
||||
// and the book "The Elements of Computing Systems"
|
||||
// by Nisan and Schocken, MIT Press.
|
||||
// File name: tools/builtInChips/HalfAdder.hdl
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||||
/**
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||||
* Computes the sum of two bits.
|
||||
*/
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||||
CHIP HalfAdder {
|
||||
|
||||
IN a, b;
|
||||
OUT sum, // LSB of a + b
|
||||
carry; // MSB of a + b
|
||||
|
||||
BUILTIN HalfAdder;
|
||||
}
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||||
BIN
original/tools/builtInChips/Inc16.class
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original/tools/builtInChips/Inc16.class
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original/tools/builtInChips/Inc16.hdl
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original/tools/builtInChips/Inc16.hdl
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|
||||
// This file is part of www.nand2tetris.org
|
||||
// and the book "The Elements of Computing Systems"
|
||||
// by Nisan and Schocken, MIT Press.
|
||||
// File name: tools/builtInChips/Inc16.hdl
|
||||
/**
|
||||
* 16-bit incrementer:
|
||||
* out = in + 1
|
||||
*/
|
||||
CHIP Inc16 {
|
||||
|
||||
IN in[16];
|
||||
OUT out[16];
|
||||
|
||||
BUILTIN Inc16;
|
||||
}
|
||||
BIN
original/tools/builtInChips/Keyboard.class
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original/tools/builtInChips/Keyboard.class
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original/tools/builtInChips/Keyboard.hdl
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17
original/tools/builtInChips/Keyboard.hdl
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|
||||
// This file is part of www.nand2tetris.org
|
||||
// and the book "The Elements of Computing Systems"
|
||||
// by Nisan and Schocken, MIT Press.
|
||||
// File name: tools/builtInChips/Keyboard.hdl
|
||||
/**
|
||||
* The keyboard (memory map).
|
||||
* Outputs the character code of the currently pressed key,
|
||||
* or 0 if no key is pressed.
|
||||
*
|
||||
* This built-in implementation has a visualization side effect.
|
||||
*/
|
||||
CHIP Keyboard {
|
||||
|
||||
OUT out[16];
|
||||
|
||||
BUILTIN Keyboard;
|
||||
}
|
||||
BIN
original/tools/builtInChips/Mux.class
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BIN
original/tools/builtInChips/Mux.class
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15
original/tools/builtInChips/Mux.hdl
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15
original/tools/builtInChips/Mux.hdl
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|
||||
// This file is part of www.nand2tetris.org
|
||||
// and the book "The Elements of Computing Systems"
|
||||
// by Nisan and Schocken, MIT Press.
|
||||
// File name: tools/builtInChips/Mux.hdl
|
||||
/**
|
||||
* Multiplexor:
|
||||
* out = ((sel == 0), a, b)
|
||||
*/
|
||||
CHIP Mux {
|
||||
|
||||
IN a, b, sel;
|
||||
OUT out;
|
||||
|
||||
BUILTIN Mux;
|
||||
}
|
||||
15
original/tools/builtInChips/Mux16.hdl
Normal file
15
original/tools/builtInChips/Mux16.hdl
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|
||||
// This file is part of www.nand2tetris.org
|
||||
// and the book "The Elements of Computing Systems"
|
||||
// by Nisan and Schocken, MIT Press.
|
||||
// File name: tools/builtInChips/Mux16.hdl
|
||||
/**
|
||||
* 16-bit multiplexor:
|
||||
* out[i] = ((sel == 0), a[i], b[i]) for i = 0..15
|
||||
*/
|
||||
CHIP Mux16 {
|
||||
|
||||
IN a[16], b[16], sel;
|
||||
OUT out[16];
|
||||
|
||||
BUILTIN Mux;
|
||||
}
|
||||
BIN
original/tools/builtInChips/Mux4Way16.class
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BIN
original/tools/builtInChips/Mux4Way16.class
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18
original/tools/builtInChips/Mux4Way16.hdl
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18
original/tools/builtInChips/Mux4Way16.hdl
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|
||||
// This file is part of www.nand2tetris.org
|
||||
// and the book "The Elements of Computing Systems"
|
||||
// by Nisan and Schocken, MIT Press.
|
||||
// File name: tools/builtInChips/Mux4Way16.hdl
|
||||
/**
|
||||
* 4-way 16-bit multiplexor:
|
||||
* out = a if sel == 00
|
||||
* b if sel == 01
|
||||
* c if sel == 10
|
||||
* d if sel == 11
|
||||
*/
|
||||
CHIP Mux4Way16 {
|
||||
|
||||
IN a[16], b[16], c[16], d[16], sel[2];
|
||||
OUT out[16];
|
||||
|
||||
BUILTIN Mux4Way16;
|
||||
}
|
||||
BIN
original/tools/builtInChips/Mux8Way16.class
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BIN
original/tools/builtInChips/Mux8Way16.class
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21
original/tools/builtInChips/Mux8Way16.hdl
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21
original/tools/builtInChips/Mux8Way16.hdl
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|
||||
// This file is part of www.nand2tetris.org
|
||||
// and the book "The Elements of Computing Systems"
|
||||
// by Nisan and Schocken, MIT Press.
|
||||
// File name: tools/builtInChips/Mux8Way16.hdl
|
||||
/**
|
||||
* 8-way 16-bit multiplexor:
|
||||
* out = a if sel == 000
|
||||
* b if sel == 001
|
||||
* ...
|
||||
* h if sel == 111
|
||||
*/
|
||||
CHIP Mux8Way16 {
|
||||
|
||||
IN a[16], b[16], c[16], d[16],
|
||||
e[16], f[16], g[16], h[16],
|
||||
sel[3];
|
||||
|
||||
OUT out[16];
|
||||
|
||||
BUILTIN Mux8Way16;
|
||||
}
|
||||
BIN
original/tools/builtInChips/Nand.class
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BIN
original/tools/builtInChips/Nand.class
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15
original/tools/builtInChips/Nand.hdl
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15
original/tools/builtInChips/Nand.hdl
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@@ -0,0 +1,15 @@
|
||||
// This file is part of www.nand2tetris.org
|
||||
// and the book "The Elements of Computing Systems"
|
||||
// by Nisan and Schocken, MIT Press.
|
||||
// File name: tools/builtInChips/Nand.hdl
|
||||
/**
|
||||
* Nand gate:
|
||||
* out = (((a == 1) && (b == 1))), 0, 1)
|
||||
*/
|
||||
CHIP Nand {
|
||||
|
||||
IN a, b;
|
||||
OUT out;
|
||||
|
||||
BUILTIN Nand;
|
||||
}
|
||||
BIN
original/tools/builtInChips/Not.class
Normal file
BIN
original/tools/builtInChips/Not.class
Normal file
Binary file not shown.
15
original/tools/builtInChips/Not.hdl
Normal file
15
original/tools/builtInChips/Not.hdl
Normal file
@@ -0,0 +1,15 @@
|
||||
// This file is part of www.nand2tetris.org
|
||||
// and the book "The Elements of Computing Systems"
|
||||
// by Nisan and Schocken, MIT Press.
|
||||
// File name: tools/builtInChips/Not.hdl
|
||||
/**
|
||||
* Not gate:
|
||||
* out = ((in == 0), 1, 0)
|
||||
*/
|
||||
CHIP Not {
|
||||
|
||||
IN in;
|
||||
OUT out;
|
||||
|
||||
BUILTIN Not;
|
||||
}
|
||||
BIN
original/tools/builtInChips/Not16.class
Normal file
BIN
original/tools/builtInChips/Not16.class
Normal file
Binary file not shown.
15
original/tools/builtInChips/Not16.hdl
Normal file
15
original/tools/builtInChips/Not16.hdl
Normal file
@@ -0,0 +1,15 @@
|
||||
// This file is part of www.nand2tetris.org
|
||||
// and the book "The Elements of Computing Systems"
|
||||
// by Nisan and Schocken, MIT Press.
|
||||
// File name: tools/builtInChips/Not16.hdl
|
||||
/**
|
||||
* 16-bit Not gate:
|
||||
* out[i] = ((in[i] == 0), 1, 0) for i = 0..15
|
||||
*/
|
||||
CHIP Not16 {
|
||||
|
||||
IN in[16];
|
||||
OUT out[16];
|
||||
|
||||
BUILTIN Not16;
|
||||
}
|
||||
BIN
original/tools/builtInChips/Or.class
Normal file
BIN
original/tools/builtInChips/Or.class
Normal file
Binary file not shown.
15
original/tools/builtInChips/Or.hdl
Normal file
15
original/tools/builtInChips/Or.hdl
Normal file
@@ -0,0 +1,15 @@
|
||||
// This file is part of www.nand2tetris.org
|
||||
// and the book "The Elements of Computing Systems"
|
||||
// by Nisan and Schocken, MIT Press.
|
||||
// File name: tools/builtInChips/Or.hdl
|
||||
/**
|
||||
* Or gate:
|
||||
* out = (((a == 1) || (b == 1))), 1, 0)
|
||||
*/
|
||||
CHIP Or {
|
||||
|
||||
IN a, b;
|
||||
OUT out;
|
||||
|
||||
BUILTIN Or;
|
||||
}
|
||||
15
original/tools/builtInChips/Or16.hdl
Normal file
15
original/tools/builtInChips/Or16.hdl
Normal file
@@ -0,0 +1,15 @@
|
||||
// This file is part of www.nand2tetris.org
|
||||
// and the book "The Elements of Computing Systems"
|
||||
// by Nisan and Schocken, MIT Press.
|
||||
// File name: tools/builtInChips/Or16.hdl
|
||||
/**
|
||||
* 16-bit bitwise Or gate:
|
||||
* out[i] = (a[i] Or b[i]) for i = 0..15
|
||||
*/
|
||||
CHIP Or16 {
|
||||
|
||||
IN a[16], b[16];
|
||||
OUT out[16];
|
||||
|
||||
BUILTIN Or;
|
||||
}
|
||||
BIN
original/tools/builtInChips/Or8Way.class
Normal file
BIN
original/tools/builtInChips/Or8Way.class
Normal file
Binary file not shown.
15
original/tools/builtInChips/Or8Way.hdl
Normal file
15
original/tools/builtInChips/Or8Way.hdl
Normal file
@@ -0,0 +1,15 @@
|
||||
// This file is part of www.nand2tetris.org
|
||||
// and the book "The Elements of Computing Systems"
|
||||
// by Nisan and Schocken, MIT Press.
|
||||
// File name: tools/builtInChips/Or8Way.hdl
|
||||
/**
|
||||
* 8-way Or gate:
|
||||
* out = in[0] Or in[1] Or ... Or in[7]
|
||||
*/
|
||||
CHIP Or8Way {
|
||||
|
||||
IN in[8];
|
||||
OUT out;
|
||||
|
||||
BUILTIN Or8Way;
|
||||
}
|
||||
BIN
original/tools/builtInChips/PC.class
Normal file
BIN
original/tools/builtInChips/PC.class
Normal file
Binary file not shown.
23
original/tools/builtInChips/PC.hdl
Normal file
23
original/tools/builtInChips/PC.hdl
Normal file
@@ -0,0 +1,23 @@
|
||||
// This file is part of www.nand2tetris.org
|
||||
// and the book "The Elements of Computing Systems"
|
||||
// by Nisan and Schocken, MIT Press.
|
||||
// File name: tools/builtInChips/PC.hdl
|
||||
|
||||
/**
|
||||
* A 16-bit counter with increment, load, and reset modes.
|
||||
* if (inc(t) == 1) out(t+1) = out(t) + 1
|
||||
* else if (load(t) == 1) out(t+1) = in(t)
|
||||
* else if (reset(t) == 1) out(t+1) = 0
|
||||
* else out(t+1) = out(t).
|
||||
*
|
||||
* To select a mode, assert the relevant control bit,
|
||||
* and de-assert the other two bits.
|
||||
*/
|
||||
CHIP PC {
|
||||
|
||||
IN in[16], load, inc, reset;
|
||||
OUT out[16];
|
||||
|
||||
BUILTIN PC;
|
||||
CLOCKED in, load, inc, reset;
|
||||
}
|
||||
BIN
original/tools/builtInChips/RAM.class
Normal file
BIN
original/tools/builtInChips/RAM.class
Normal file
Binary file not shown.
BIN
original/tools/builtInChips/RAM16K.class
Normal file
BIN
original/tools/builtInChips/RAM16K.class
Normal file
Binary file not shown.
18
original/tools/builtInChips/RAM16K.hdl
Normal file
18
original/tools/builtInChips/RAM16K.hdl
Normal file
@@ -0,0 +1,18 @@
|
||||
// This file is part of www.nand2tetris.org
|
||||
// and the book "The Elements of Computing Systems"
|
||||
// by Nisan and Schocken, MIT Press.
|
||||
// File name: tools/builtInChips/RAM16K.hdl
|
||||
/**
|
||||
* Memory of 16K 16-bit registers.
|
||||
* If load is asserted, the value of the register selected by
|
||||
* address is set to in; Otherwise, the value does not change.
|
||||
* The value of the selected register is emitted by out.
|
||||
*/
|
||||
CHIP RAM16K {
|
||||
|
||||
IN in[16], load, address[14];
|
||||
OUT out[16];
|
||||
|
||||
BUILTIN RAM16K;
|
||||
CLOCKED in, load;
|
||||
}
|
||||
BIN
original/tools/builtInChips/RAM4K.class
Normal file
BIN
original/tools/builtInChips/RAM4K.class
Normal file
Binary file not shown.
18
original/tools/builtInChips/RAM4K.hdl
Normal file
18
original/tools/builtInChips/RAM4K.hdl
Normal file
@@ -0,0 +1,18 @@
|
||||
// This file is part of www.nand2tetris.org
|
||||
// and the book "The Elements of Computing Systems"
|
||||
// by Nisan and Schocken, MIT Press.
|
||||
// File name: tools/builtInChips/RAM4K.hdl
|
||||
/**
|
||||
* Memory of 4K 16-bit registers.
|
||||
* If load is asserted, the value of the register selected by
|
||||
* address is set to in; Otherwise, the value does not change.
|
||||
* The value of the selected register is emitted by out.
|
||||
*/
|
||||
CHIP RAM4K {
|
||||
|
||||
IN in[16], load, address[12];
|
||||
OUT out[16];
|
||||
|
||||
BUILTIN RAM4K;
|
||||
CLOCKED in, load;
|
||||
}
|
||||
BIN
original/tools/builtInChips/RAM512.class
Normal file
BIN
original/tools/builtInChips/RAM512.class
Normal file
Binary file not shown.
18
original/tools/builtInChips/RAM512.hdl
Normal file
18
original/tools/builtInChips/RAM512.hdl
Normal file
@@ -0,0 +1,18 @@
|
||||
// This file is part of www.nand2tetris.org
|
||||
// and the book "The Elements of Computing Systems"
|
||||
// by Nisan and Schocken, MIT Press.
|
||||
// File name: tools/builtInChips/RAM512.hdl
|
||||
/**
|
||||
* Memory of 512 16-bit registers.
|
||||
* If load is asserted, the value of the register selected by
|
||||
* address is set to in; Otherwise, the value does not change.
|
||||
* The value of the selected register is emitted by out.
|
||||
*/
|
||||
CHIP RAM512 {
|
||||
|
||||
IN in[16], load, address[9];
|
||||
OUT out[16];
|
||||
|
||||
BUILTIN RAM512;
|
||||
CLOCKED in, load;
|
||||
}
|
||||
BIN
original/tools/builtInChips/RAM64.class
Normal file
BIN
original/tools/builtInChips/RAM64.class
Normal file
Binary file not shown.
18
original/tools/builtInChips/RAM64.hdl
Normal file
18
original/tools/builtInChips/RAM64.hdl
Normal file
@@ -0,0 +1,18 @@
|
||||
// This file is part of www.nand2tetris.org
|
||||
// and the book "The Elements of Computing Systems"
|
||||
// by Nisan and Schocken, MIT Press.
|
||||
// File name: tools/builtInChips/RAM64.hdl
|
||||
/**
|
||||
* Memory of sixty four 16-bit registers.
|
||||
* If load is asserted, the value of the register selected by
|
||||
* address is set to in; Otherwise, the value does not change.
|
||||
* The value of the selected register is emitted by out.
|
||||
*/
|
||||
CHIP RAM64 {
|
||||
|
||||
IN in[16], load, address[6];
|
||||
OUT out[16];
|
||||
|
||||
BUILTIN RAM64;
|
||||
CLOCKED in, load;
|
||||
}
|
||||
BIN
original/tools/builtInChips/RAM8.class
Normal file
BIN
original/tools/builtInChips/RAM8.class
Normal file
Binary file not shown.
18
original/tools/builtInChips/RAM8.hdl
Normal file
18
original/tools/builtInChips/RAM8.hdl
Normal file
@@ -0,0 +1,18 @@
|
||||
// This file is part of www.nand2tetris.org
|
||||
// and the book "The Elements of Computing Systems"
|
||||
// by Nisan and Schocken, MIT Press.
|
||||
// File name: tools/builtInChips/RAM8.hdl
|
||||
/**
|
||||
* Memory of eight 16-bit registers.
|
||||
* If load is asserted, the value of the register selected by
|
||||
* address is set to in; Otherwise, the value does not change.
|
||||
* The value of the selected register is emitted by out.
|
||||
*/
|
||||
CHIP RAM8 {
|
||||
|
||||
IN in[16], load, address[3];
|
||||
OUT out[16];
|
||||
|
||||
BUILTIN RAM8;
|
||||
CLOCKED in, load;
|
||||
}
|
||||
BIN
original/tools/builtInChips/ROM32K.class
Normal file
BIN
original/tools/builtInChips/ROM32K.class
Normal file
Binary file not shown.
25
original/tools/builtInChips/ROM32K.hdl
Normal file
25
original/tools/builtInChips/ROM32K.hdl
Normal file
@@ -0,0 +1,25 @@
|
||||
// This file is part of www.nand2tetris.org
|
||||
// and the book "The Elements of Computing Systems"
|
||||
// by Nisan and Schocken, MIT Press.
|
||||
// File name: tools/builtInChips/ROM32K.hdl
|
||||
/**
|
||||
* Read-Only memory (ROM) of 32K registers, each 16-bit wide.
|
||||
* Facilitates data read, as follows:
|
||||
* out(t) = ROM32K[address(t)](t)
|
||||
* In words: the chip outputs the value stored at the
|
||||
* memory location specified by address.
|
||||
*
|
||||
* Can be used to serve as the instruction memory of the Hack computer.
|
||||
* To that end, the built-in chip implementation supports the handling
|
||||
* of the "ROM32K load Xxx" script command, where Xxx is the name of a
|
||||
* text file containing a program written in the Hack machine language.
|
||||
* When the simulator encounters such a command in a test script,
|
||||
* the code found in the file is loaded into the simulated ROM32K chip.
|
||||
*/
|
||||
CHIP ROM32K {
|
||||
|
||||
IN address[15];
|
||||
OUT out[16];
|
||||
|
||||
BUILTIN ROM32K;
|
||||
}
|
||||
BIN
original/tools/builtInChips/Register.class
Normal file
BIN
original/tools/builtInChips/Register.class
Normal file
Binary file not shown.
18
original/tools/builtInChips/Register.hdl
Normal file
18
original/tools/builtInChips/Register.hdl
Normal file
@@ -0,0 +1,18 @@
|
||||
// This file is part of www.nand2tetris.org
|
||||
// and the book "The Elements of Computing Systems"
|
||||
// by Nisan and Schocken, MIT Press.
|
||||
// File name: tools/builtInChips/Register.hdl
|
||||
/**
|
||||
* 16-bit register:
|
||||
* If load is asserted, the register's value is set to in;
|
||||
* Otherwise, the register maintains its current value.
|
||||
* out(t+1) = (load(t), in(t), out(t))
|
||||
*/
|
||||
CHIP Register {
|
||||
|
||||
IN in[16], load;
|
||||
OUT out[16];
|
||||
|
||||
BUILTIN Register;
|
||||
CLOCKED in, load;
|
||||
}
|
||||
BIN
original/tools/builtInChips/RegisterWithGUI.class
Normal file
BIN
original/tools/builtInChips/RegisterWithGUI.class
Normal file
Binary file not shown.
BIN
original/tools/builtInChips/Screen.class
Normal file
BIN
original/tools/builtInChips/Screen.class
Normal file
Binary file not shown.
33
original/tools/builtInChips/Screen.hdl
Normal file
33
original/tools/builtInChips/Screen.hdl
Normal file
@@ -0,0 +1,33 @@
|
||||
// This file is part of www.nand2tetris.org
|
||||
// and the book "The Elements of Computing Systems"
|
||||
// by Nisan and Schocken, MIT Press.
|
||||
// File name: tools/builtInChips/Screen.hdl
|
||||
/**
|
||||
* The Screen (memory map).
|
||||
* Same functionality as a 16-bit 8K RAM:
|
||||
* If load is asserted, the value of the register selected by
|
||||
* address is set to in; Otherwise, the value does not change.
|
||||
* The value of the selected register is emitted by out.
|
||||
*
|
||||
* This built-in implementation has the side effect of continuously
|
||||
* refreshing a visual 256 by 512 black-and-white screen, simulated
|
||||
* by the simulator. Each row in the visual screen is represented
|
||||
* by 32 consecutive 16-bit words, starting at the top left corner
|
||||
* of the visual screen. Thus the pixel at row r from the top and
|
||||
* column c from the left (0<=r<256, 0<=c<512) reflects the c%16
|
||||
* bit (counting from LSB to MSB) of the word found in Screen[r*32+c/16].
|
||||
*/
|
||||
CHIP Screen {
|
||||
|
||||
IN in[16], // what to write
|
||||
load, // write-enable bit
|
||||
address[13]; // where to read/write
|
||||
OUT out[16]; // Screen value at the given address
|
||||
|
||||
BUILTIN Screen;
|
||||
CLOCKED in, load;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
BIN
original/tools/builtInChips/Xor.class
Normal file
BIN
original/tools/builtInChips/Xor.class
Normal file
Binary file not shown.
15
original/tools/builtInChips/Xor.hdl
Normal file
15
original/tools/builtInChips/Xor.hdl
Normal file
@@ -0,0 +1,15 @@
|
||||
// This file is part of www.nand2tetris.org
|
||||
// and the book "The Elements of Computing Systems"
|
||||
// by Nisan and Schocken, MIT Press.
|
||||
// File name: tools/builtInChips/Xor.hdl
|
||||
/**
|
||||
* Exclusive-or gate:
|
||||
* out = (((a == 0) & (b = 1)) | ((a == 1) & (b = 0)), 1, 0)
|
||||
*/
|
||||
CHIP Xor {
|
||||
|
||||
IN a, b;
|
||||
OUT out;
|
||||
|
||||
BUILTIN Xor;
|
||||
}
|
||||
Reference in New Issue
Block a user