Anpassungen Path-Struktur

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/ALU.hdl
/**
* ALU (Arithmetic Logic Unit):
* Computes out = one of the following functions:
* 0, 1, -1,
* x, y, !x, !y, -x, -y,
* x + 1, y + 1, x - 1, y - 1,
* x + y, x - y, y - x,
* x & y, x | y
* on the 16-bit inputs x, y,
* according to the input bits zx, nx, zy, ny, f, no.
* In addition, computes the output bits:
* zr = (out == 0, 1, 0)
* ng = (out < 0, 1, 0)
*/
// Implementation: Manipulates the x and y inputs
// and operates on the resulting values, as follows:
// if (zx == 1) sets x = 0 // 16-bit constant
// if (nx == 1) sets x = !x // bitwise not
// if (zy == 1) sets y = 0 // 16-bit constant
// if (ny == 1) sets y = !y // bitwise not
// if (f == 1) sets out = x + y // integer 2's complement addition
// if (f == 0) sets out = x & y // bitwise and
// if (no == 1) sets out = !out // bitwise not
CHIP ALU {
IN // 16-bit inputs:
x[16], y[16],
// Control bits:
zx, // Zero the x input
nx, // Negate the x input
zy, // Zero the y input
ny, // Negate the y input
f, // Function code: 1 for add, 0 for and
no; // Negate the out output
OUT // 16-bit output
out[16],
// ALU output flags
zr, // 1 if out=0, 0 otherwise
ng; // 1 if out<0, 0 otherwise
BUILTIN ALU;
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/ARegister.hdl
/**
* A 16-bit register named ARegister with the same functionality
* of the Register chip:
* If load is asserted, the register's value is set to in;
* Otherwise, the register maintains its current value.
* out(t+1) = (load(t), in(t), out(t))
*
* This built-in implementation has a visualization side effect.
*/
CHIP ARegister {
IN in[16], load;
OUT out[16];
BUILTIN ARegister;
CLOCKED in, load;
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/Add16.hdl
/**
* 16-bit adder: Adds two 16-bit two's complement values.
* The most significant carry bit is ignored.
*/
CHIP Add16 {
IN a[16], b[16];
OUT out[16];
BUILTIN Add16;
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/And.hdl
/**
* And gate:
* out = (((a == 1) && (b == 1))), 1, 0)
*/
CHIP And {
IN a, b;
OUT out;
BUILTIN And;
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/And16.hdl
/**
* 16-bit bitwise And gate:
* out[i] = And(a[i],b[i]) for i = 0..15
*/
CHIP And16 {
IN a[16], b[16];
OUT out[16];
BUILTIN And;
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/Bit.hdl
/**
* 1-bit register:
* If load is asserted, the register's value is set to in;
* Otherwise, the register maintains its current value.
* out(t+1) = (load(t), in(t), out(t))
*/
CHIP Bit {
IN in, load;
OUT out;
BUILTIN Bit;
CLOCKED in, load;
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/DFF.hdl
/**
* Data Flip-flop: out(t) = in(t-1)
* where t is the current time unit, or clock cycle.
*/
CHIP DFF {
IN in;
OUT out;
BUILTIN DFF;
CLOCKED in;
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/DMux.hdl
/**
* Demultiplexor:
* [a, b] = ((sel == 0), [in, 0], [0, in])
*/
CHIP DMux {
IN in, sel;
OUT a, b;
BUILTIN DMux;
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/DMux4Way.hdl
/**
* 4-way demultiplexor:
* [a, b, c, d] = [in, 0, 0, 0] if sel == 00
* [0, in, 0, 0] if sel == 01
* [0, 0, in, 0] if sel == 10
* [0, 0, 0, in] if sel == 11
*/
CHIP DMux4Way {
IN in, sel[2];
OUT a, b, c, d;
BUILTIN DMux4Way;
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/DMux8Way.hdl
/**
* 8-way demultiplexor:
* [a, b, c, d, e, f, g, h] = [in, 0, 0, 0, 0, 0, 0, 0] if sel == 000
* [0, in, 0, 0, 0, 0, 0, 0] if sel == 001
* ...
* [0, 0, 0, 0, 0, 0, 0, in] if sel == 111
*/
CHIP DMux8Way {
IN in, sel[3];
OUT a, b, c, d, e, f, g, h;
BUILTIN DMux8Way;
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/DRegister.hdl
/**
* A 16-bit register named DRegister with the same functionality
* of the Register chip:
* If load is asserted, the register's value is set to in;
* Otherwise, the register maintains its current value.
* out(t+1) = (load(t), in(t), out(t))
*
* This built-in implementation has a visualization side effect.
*/
CHIP DRegister {
IN in[16], load;
OUT out[16];
BUILTIN DRegister;
CLOCKED in, load;
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/FullAdder.hdl
/**
* Computes the sum of three bits.
*/
CHIP FullAdder {
IN a, b, c;
OUT sum, // LSB of a + b + c
carry; // MSB of a + b + c
BUILTIN FullAdder;
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/HalfAdder.hdl
/**
* Computes the sum of two bits.
*/
CHIP HalfAdder {
IN a, b;
OUT sum, // LSB of a + b
carry; // MSB of a + b
BUILTIN HalfAdder;
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/Inc16.hdl
/**
* 16-bit incrementer:
* out = in + 1
*/
CHIP Inc16 {
IN in[16];
OUT out[16];
BUILTIN Inc16;
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/Keyboard.hdl
/**
* The keyboard (memory map).
* Outputs the character code of the currently pressed key,
* or 0 if no key is pressed.
*
* This built-in implementation has a visualization side effect.
*/
CHIP Keyboard {
OUT out[16];
BUILTIN Keyboard;
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/Mux.hdl
/**
* Multiplexor:
* out = ((sel == 0), a, b)
*/
CHIP Mux {
IN a, b, sel;
OUT out;
BUILTIN Mux;
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/Mux16.hdl
/**
* 16-bit multiplexor:
* out[i] = ((sel == 0), a[i], b[i]) for i = 0..15
*/
CHIP Mux16 {
IN a[16], b[16], sel;
OUT out[16];
BUILTIN Mux;
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/Mux4Way16.hdl
/**
* 4-way 16-bit multiplexor:
* out = a if sel == 00
* b if sel == 01
* c if sel == 10
* d if sel == 11
*/
CHIP Mux4Way16 {
IN a[16], b[16], c[16], d[16], sel[2];
OUT out[16];
BUILTIN Mux4Way16;
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/Mux8Way16.hdl
/**
* 8-way 16-bit multiplexor:
* out = a if sel == 000
* b if sel == 001
* ...
* h if sel == 111
*/
CHIP Mux8Way16 {
IN a[16], b[16], c[16], d[16],
e[16], f[16], g[16], h[16],
sel[3];
OUT out[16];
BUILTIN Mux8Way16;
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/Nand.hdl
/**
* Nand gate:
* out = (((a == 1) && (b == 1))), 0, 1)
*/
CHIP Nand {
IN a, b;
OUT out;
BUILTIN Nand;
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/Not.hdl
/**
* Not gate:
* out = ((in == 0), 1, 0)
*/
CHIP Not {
IN in;
OUT out;
BUILTIN Not;
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/Not16.hdl
/**
* 16-bit Not gate:
* out[i] = ((in[i] == 0), 1, 0) for i = 0..15
*/
CHIP Not16 {
IN in[16];
OUT out[16];
BUILTIN Not16;
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/Or.hdl
/**
* Or gate:
* out = (((a == 1) || (b == 1))), 1, 0)
*/
CHIP Or {
IN a, b;
OUT out;
BUILTIN Or;
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/Or16.hdl
/**
* 16-bit bitwise Or gate:
* out[i] = (a[i] Or b[i]) for i = 0..15
*/
CHIP Or16 {
IN a[16], b[16];
OUT out[16];
BUILTIN Or;
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/Or8Way.hdl
/**
* 8-way Or gate:
* out = in[0] Or in[1] Or ... Or in[7]
*/
CHIP Or8Way {
IN in[8];
OUT out;
BUILTIN Or8Way;
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/PC.hdl
/**
* A 16-bit counter with increment, load, and reset modes.
* if (inc(t) == 1) out(t+1) = out(t) + 1
* else if (load(t) == 1) out(t+1) = in(t)
* else if (reset(t) == 1) out(t+1) = 0
* else out(t+1) = out(t).
*
* To select a mode, assert the relevant control bit,
* and de-assert the other two bits.
*/
CHIP PC {
IN in[16], load, inc, reset;
OUT out[16];
BUILTIN PC;
CLOCKED in, load, inc, reset;
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/RAM16K.hdl
/**
* Memory of 16K 16-bit registers.
* If load is asserted, the value of the register selected by
* address is set to in; Otherwise, the value does not change.
* The value of the selected register is emitted by out.
*/
CHIP RAM16K {
IN in[16], load, address[14];
OUT out[16];
BUILTIN RAM16K;
CLOCKED in, load;
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/RAM4K.hdl
/**
* Memory of 4K 16-bit registers.
* If load is asserted, the value of the register selected by
* address is set to in; Otherwise, the value does not change.
* The value of the selected register is emitted by out.
*/
CHIP RAM4K {
IN in[16], load, address[12];
OUT out[16];
BUILTIN RAM4K;
CLOCKED in, load;
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/RAM512.hdl
/**
* Memory of 512 16-bit registers.
* If load is asserted, the value of the register selected by
* address is set to in; Otherwise, the value does not change.
* The value of the selected register is emitted by out.
*/
CHIP RAM512 {
IN in[16], load, address[9];
OUT out[16];
BUILTIN RAM512;
CLOCKED in, load;
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/RAM64.hdl
/**
* Memory of sixty four 16-bit registers.
* If load is asserted, the value of the register selected by
* address is set to in; Otherwise, the value does not change.
* The value of the selected register is emitted by out.
*/
CHIP RAM64 {
IN in[16], load, address[6];
OUT out[16];
BUILTIN RAM64;
CLOCKED in, load;
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/RAM8.hdl
/**
* Memory of eight 16-bit registers.
* If load is asserted, the value of the register selected by
* address is set to in; Otherwise, the value does not change.
* The value of the selected register is emitted by out.
*/
CHIP RAM8 {
IN in[16], load, address[3];
OUT out[16];
BUILTIN RAM8;
CLOCKED in, load;
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/ROM32K.hdl
/**
* Read-Only memory (ROM) of 32K registers, each 16-bit wide.
* Facilitates data read, as follows:
* out(t) = ROM32K[address(t)](t)
* In words: the chip outputs the value stored at the
* memory location specified by address.
*
* Can be used to serve as the instruction memory of the Hack computer.
* To that end, the built-in chip implementation supports the handling
* of the "ROM32K load Xxx" script command, where Xxx is the name of a
* text file containing a program written in the Hack machine language.
* When the simulator encounters such a command in a test script,
* the code found in the file is loaded into the simulated ROM32K chip.
*/
CHIP ROM32K {
IN address[15];
OUT out[16];
BUILTIN ROM32K;
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/Register.hdl
/**
* 16-bit register:
* If load is asserted, the register's value is set to in;
* Otherwise, the register maintains its current value.
* out(t+1) = (load(t), in(t), out(t))
*/
CHIP Register {
IN in[16], load;
OUT out[16];
BUILTIN Register;
CLOCKED in, load;
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/Screen.hdl
/**
* The Screen (memory map).
* Same functionality as a 16-bit 8K RAM:
* If load is asserted, the value of the register selected by
* address is set to in; Otherwise, the value does not change.
* The value of the selected register is emitted by out.
*
* This built-in implementation has the side effect of continuously
* refreshing a visual 256 by 512 black-and-white screen, simulated
* by the simulator. Each row in the visual screen is represented
* by 32 consecutive 16-bit words, starting at the top left corner
* of the visual screen. Thus the pixel at row r from the top and
* column c from the left (0<=r<256, 0<=c<512) reflects the c%16
* bit (counting from LSB to MSB) of the word found in Screen[r*32+c/16].
*/
CHIP Screen {
IN in[16], // what to write
load, // write-enable bit
address[13]; // where to read/write
OUT out[16]; // Screen value at the given address
BUILTIN Screen;
CLOCKED in, load;
}

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: tools/builtInChips/Xor.hdl
/**
* Exclusive-or gate:
* out = (((a == 0) & (b = 1)) | ((a == 1) & (b = 0)), 1, 0)
*/
CHIP Xor {
IN a, b;
OUT out;
BUILTIN Xor;
}