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Sven Riwoldt
2023-03-23 16:37:51 +01:00
parent e904fbf523
commit b2511b5e6e
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Digitaltechnik Grundlagen, VHDL, FPGAs, Mikrocontroller by Winfried Gehrke, Marco Winzker, Klaus Urbanski, Roland Woitowitz.pdf Normal file
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Digitaltechnik by Klaus Fricke.pdf Normal file
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Nand2Tetris.odt Normal file
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The Elements of Computing Systems_ Buildin - Nisan, Noam.docx Normal file
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projects/04/tests/test01.asm Normal file
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@R0 // Register 0
D=M // Datenregister bekommt Ra
@n // automatisch wird ein Register ausgewählt, hier @16
M=D // Der RAM[16] bekommt den Inhalt des D-Registers, also von der CPU
@i // wiederum wird ein Register automatisch adressiert, hier z.B. RAM[17]
M=1 // Dieses Register wird nun mit einer "1" befüllt
@sum // das nächste automatisch adressierte Register @18 == RAM[18]
M=0 //