const hdl = ` Hdl <: Base{ Root := Chip identifier := (letter) (alnum)* Name := identifier Chip = "CHIP" Name OpenBrace ChipBody CloseBrace ChipBody = InList? OutList? PartList ClockedList? InList = "IN" PinList Semi OutList = "OUT" PinList Semi PartList = BuiltinPart | Parts PinList = List PinDecl = Name PinWidth? PinWidth = OpenSquare decNumber CloseSquare BuiltinPart = "BUILTIN" Semi Parts = "PARTS:" Part* Part = Name "(" Wires ")" Semi Wires = List Wire = WireSide Equal (WireSide | True | False) WireSide = Name SubBus? SubBus = OpenSquare decNumber subBusRest? CloseSquare subBusRest = ".." decNumber ClockedList = "CLOCKED" SimplePinList Semi SimplePinList = List }`; export default hdl;