-- VHDL for hades.models.gates.Nand2: /unnamed/i2
--

library IEEE;
use IEEE.std_logic_1164.all;


entity hades_models_gates_Nand2 is 
    port (
         Y :       out  std_logic;
         A :       in   std_logic;
         B :       in   std_logic
    );
end hades_models_gates_Nand2;


-- default architecture for: hades.models.gates.Nand2: /unnamed/i2
--
architecture SIMPLE of hades_models_gates_Nand2 is
begin
  Y <= not (A and B);
end SIMPLE;



configuration cfg_hades_models_gates_Nand2 of hades_models_gates_Nand2 is
  for SIMPLE
  end for;
end cfg_hades_models_gates_Nand2;