// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/02/ALU.hdl

/**
 * The ALU (Arithmetic Logic Unit).
 * Computes one of the following functions:
 * x+y, x-y, y-x, 0, 1, -1, x, y, -x, -y, !x, !y,
 * x+1, y+1, x-1, y-1, x&y, x|y on two 16-bit inputs, 
 * according to 6 input bits denoted zx,nx,zy,ny,f,no.
 * In addition, the ALU computes two 1-bit outputs:
 * if the ALU output == 0, zr is set to 1; otherwise zr is set to 0;
 * if the ALU output < 0, ng is set to 1; otherwise ng is set to 0.
 */

// Implementation: the ALU logic manipulates the x and y inputs
// and operates on the resulting values, as follows:
// if (zx == 1) set x = 0        // 16-bit constant
// if (nx == 1) set x = !x       // bitwise not
// if (zy == 1) set y = 0        // 16-bit constant
// if (ny == 1) set y = !y       // bitwise not
// if (f == 1)  set out = x + y  // integer 2's complement addition
// if (f == 0)  set out = x & y  // bitwise and
// if (no == 1) set out = !out   // bitwise not
// if (out == 0) set zr = 1
// if (out < 0) set ng = 1

CHIP ALU {
    IN  
        x[16], y[16],  // 16-bit inputs        
        zx, // zero the x input?
        nx, // negate the x input?
        zy, // zero the y input?
        ny, // negate the y input?
        f,  // compute out = x + y (if 1) or x & y (if 0)
        no; // negate the out output?

    OUT 
        out[16], // 16-bit output
        zr, // 1 if (out == 0), 0 otherwise
        ng; // 1 if (out < 0),  0 otherwise

    PARTS:
      // x zero / negate
      Mux16(a=x, sel=zx, out=x1);
      Not16(in=x1, out=negatedX);
      Mux16(a=x1, b=negatedX, sel=nx, out=x2);

      // y zero / negate
      Mux16(a=y, sel=zy, out=y1);
      Not16(in=y1, out=negatedY);
      Mux16(a=y1, b=negatedY, sel=ny, out=y2);

      // x + y OR x & y
      Add16(a=x2, b=y2, out=added);
      And16(a=x2, b=y2, out=xyAnd);
      Mux16(a=xyAnd, b=added, sel=f, out=result);

      // negate the output?
      Not16(in=result, out=negatedResult);
      Mux16(a=result, b=negatedResult, sel=no, out=out, out[15]=firstOut, out[0..7]=finalLeft, out[8..15]=finalRight);

      // output == 0 (zr)
      Or8Way(in=finalLeft, out=zrl);
      Or8Way(in=finalRight, out=zrr);
      Or(a=zrl, b=zrr, out=nzr);
      Not(in=nzr, out=zr);

      // output < 0 (ng)
      And(a=firstOut, b=true, out=ng);

}