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nand2tetris/projects/03/einreichung/RAM16K.hdl
2023-03-22 19:51:12 +01:00

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// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/03/b/RAM16K.hdl
/**
* Memory of 16K registers, each 16 bit-wide. Out holds the value
* stored at the memory location specified by address. If load==1, then
* the in value is loaded into the memory location specified by address
* (the loaded value will be emitted to out from the next time step onward).
*/
CHIP RAM16K {
IN in[16], load, address[14];
OUT out[16];
PARTS:
DMux4Way(in=load, sel=address[0..1], a=load1, b=load2, c=load3, d=load4);
RAM4K(in=in, load=load1, address=address[2..13], out=outram1);
RAM4K(in=in, load=load2, address=address[2..13], out=outram2);
RAM4K(in=in, load=load3, address=address[2..13], out=outram3);
RAM4K(in=in, load=load4, address=address[2..13], out=outram4);
Mux4Way16(a=outram1, b=outram2, c=outram3, d=outram4,sel=address[0..1], out=out);
}