28 lines
1.3 KiB
Plaintext
28 lines
1.3 KiB
Plaintext
// This file is part of www.nand2tetris.org
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// and the book "The Elements of Computing Systems"
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// by Nisan and Schocken, MIT Press.
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// File name: projects/03/a/RAM64.hdl
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/**
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* Memory of 64 registers, each 16 bit-wide. Out holds the value
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* stored at the memory location specified by address. If load==1, then
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* the in value is loaded into the memory location specified by address
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* (the loaded value will be emitted to out from the next time step onward).
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*/
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CHIP RAM64 {
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IN in[16], load, address[6];
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OUT out[16];
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PARTS:
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DMux8Way(in=load, sel=address[0..2], a=load1, b=load2, c=load3, d=load4, e=load5, f=load6, g=load7, h=load8);
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RAM8(in=in, load=load1, address=address[3..5], out=outram1);
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RAM8(in=in, load=load2, address=address[3..5], out=outram2);
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RAM8(in=in, load=load3, address=address[3..5], out=outram3);
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RAM8(in=in, load=load4, address=address[3..5], out=outram4);
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RAM8(in=in, load=load5, address=address[3..5], out=outram5);
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RAM8(in=in, load=load6, address=address[3..5], out=outram6);
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RAM8(in=in, load=load7, address=address[3..5], out=outram7);
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RAM8(in=in, load=load8, address=address[3..5], out=outram8);
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Mux8Way16(a=outram1, b=outram2, c=outram3, d=outram4, e=outram5, f=outram6, g=outram7, h=outram8, sel=address[0..2], out=out);
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} |