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nand2tetris/projects/03/einreichung/RAM512.hdl
2023-03-22 19:51:12 +01:00

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// This file is part of the materials accompanying the book
// "The Elements of Computing Systems" by Nisan and Schocken,
// MIT Press. Book site: www.idc.ac.il/tecs
// File name: projects/03/b/RAM512.hdl
/**
* Memory of 512 registers, each 16 bit-wide. Out holds the value
* stored at the memory location specified by address. If load==1, then
* the in value is loaded into the memory location specified by address
* (the loaded value will be emitted to out from the next time step onward).
*/
CHIP RAM512 {
IN in[16], load, address[9];
OUT out[16];
PARTS:
DMux8Way(in=load, sel=address[0..2], a=load1, b=load2, c=load3, d=load4, e=load5, f=load6, g=load7, h=load8);
RAM64(in=in, load=load1, address=address[3..8], out=outram1);
RAM64(in=in, load=load2, address=address[3..8], out=outram2);
RAM64(in=in, load=load3, address=address[3..8], out=outram3);
RAM64(in=in, load=load4, address=address[3..8], out=outram4);
RAM64(in=in, load=load5, address=address[3..8], out=outram5);
RAM64(in=in, load=load6, address=address[3..8], out=outram6);
RAM64(in=in, load=load7, address=address[3..8], out=outram7);
RAM64(in=in, load=load8, address=address[3..8], out=outram8);
Mux8Way16(a=outram1, b=outram2, c=outram3, d=outram4, e=outram5, f=outram6, g=outram7, h=outram8, sel=address[0..2], out=out);
}